{"_id":"6kvFyPWtdZiqxXrBu","bibbaseid":"espasa-valero-simultaneousmultithreadedvectorarchitecturemergingilpanddlpforhighperformance-1997","downloads":0,"creationDate":"2015-12-11T14:22:08.598Z","title":"Simultaneous multithreaded vector architecture: merging ILP and DLP for high performance","author_short":["Espasa, R.","Valero, M."],"year":1997,"bibtype":"inproceedings","biburl":"http://www.dblp.org/rec/bibtex/conf/hipc/EspasaV97","bibdata":{"title":"Simultaneous multithreaded vector architecture: merging ILP and DLP for high performance","author":["Roger Espasa","Mateo Valero"],"author_short":["Espasa, R.","Valero, M."],"bibtype":"inproceedings","type":"inproceedings","year":"1997","key":"dblp4425187","id":"dblp4425187","biburl":"http://www.dblp.org/rec/bibtex/conf/hipc/EspasaV97","url":"http://doi.ieeecomputersociety.org/10.1109/HIPC.1997.634514","conference":"HiPC","pages":"350-357","text":"HiPC 1997:350-357","booktitle":"Proceedings of High Performance Computing (HiPC)","bibtex":"@inproceedings{ dblp4425187,\n title = {Simultaneous multithreaded vector architecture: merging ILP and DLP for high performance},\n author = {Roger Espasa and Mateo Valero},\n author_short = {Espasa, R. and Valero, M.},\n bibtype = {inproceedings},\n type = {inproceedings},\n year = {1997},\n key = {dblp4425187},\n id = {dblp4425187},\n biburl = {http://www.dblp.org/rec/bibtex/conf/hipc/EspasaV97},\n url = {http://doi.ieeecomputersociety.org/10.1109/HIPC.1997.634514},\n conference = {HiPC},\n pages = {350-357},\n text = {HiPC 1997:350-357},\n booktitle = {Proceedings of High Performance Computing (HiPC)}\n}","bibbaseid":"espasa-valero-simultaneousmultithreadedvectorarchitecturemergingilpanddlpforhighperformance-1997","role":"author","urls":{"Paper":"http://doi.ieeecomputersociety.org/10.1109/HIPC.1997.634514"},"downloads":0},"search_terms":["simultaneous","multithreaded","vector","architecture","merging","ilp","dlp","high","performance","espasa","valero"],"keywords":[],"authorIDs":[],"dataSources":["8Sg3mNqg5X2tkCuWt"]}