Tunnel FETs for Ultralow Voltage Digital VLSI Circuits: Part I - Device-Circuit Interaction and Evaluation at Device Level. Esseni, D., Guglielmini, M., Kapidani, B., Rollo, T., & Alioto, M. IEEE Trans. VLSI Syst., 22(12):2488-2498, 2014.
Link
Paper bibtex @article{ journals/tvlsi/EsseniGKRA14,
added-at = {2014-12-01T00:00:00.000+0100},
author = {Esseni, David and Guglielmini, Manuel and Kapidani, Bernard and Rollo, Tommaso and Alioto, Massimo},
biburl = {http://www.bibsonomy.org/bibtex/297f6878c79da0fd5c007eb25859741b8/dblp},
ee = {http://dx.doi.org/10.1109/TVLSI.2013.2293135},
interhash = {1c187b15902d39493dc3e87273f38334},
intrahash = {97f6878c79da0fd5c007eb25859741b8},
journal = {IEEE Trans. VLSI Syst.},
keywords = {dblp},
number = {12},
pages = {2488-2498},
title = {Tunnel FETs for Ultralow Voltage Digital VLSI Circuits: Part I - Device-Circuit Interaction and Evaluation at Device Level.},
url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi22.html#EsseniGKRA14},
volume = {22},
year = {2014}
}
Downloads: 0
{"_id":"LZTKp7ixX5kyWdCk4","bibbaseid":"esseni-guglielmini-kapidani-rollo-alioto-tunnelfetsforultralowvoltagedigitalvlsicircuitspartidevicecircuitinteractionandevaluationatdevicelevel-2014","downloads":0,"creationDate":"2015-05-07T12:05:11.462Z","title":"Tunnel FETs for Ultralow Voltage Digital VLSI Circuits: Part I - Device-Circuit Interaction and Evaluation at Device Level.","author_short":["Esseni, D.","Guglielmini, M.","Kapidani, B.","Rollo, T.","Alioto, M."],"year":2014,"bibtype":"article","biburl":"http://www.bibsonomy.org/bib/author/bernard?items=1000","bibdata":{"added-at":"2014-12-01T00:00:00.000+0100","author":["Esseni, David","Guglielmini, Manuel","Kapidani, Bernard","Rollo, Tommaso","Alioto, Massimo"],"author_short":["Esseni, D.","Guglielmini, M.","Kapidani, B.","Rollo, T.","Alioto, M."],"bibtex":"@article{ journals/tvlsi/EsseniGKRA14,\n added-at = {2014-12-01T00:00:00.000+0100},\n author = {Esseni, David and Guglielmini, Manuel and Kapidani, Bernard and Rollo, Tommaso and Alioto, Massimo},\n biburl = {http://www.bibsonomy.org/bibtex/297f6878c79da0fd5c007eb25859741b8/dblp},\n ee = {http://dx.doi.org/10.1109/TVLSI.2013.2293135},\n interhash = {1c187b15902d39493dc3e87273f38334},\n intrahash = {97f6878c79da0fd5c007eb25859741b8},\n journal = {IEEE Trans. VLSI Syst.},\n keywords = {dblp},\n number = {12},\n pages = {2488-2498},\n title = {Tunnel FETs for Ultralow Voltage Digital VLSI Circuits: Part I - Device-Circuit Interaction and Evaluation at Device Level.},\n url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi22.html#EsseniGKRA14},\n volume = {22},\n year = {2014}\n}","bibtype":"article","biburl":"http://www.bibsonomy.org/bibtex/297f6878c79da0fd5c007eb25859741b8/dblp","ee":"http://dx.doi.org/10.1109/TVLSI.2013.2293135","id":"journals/tvlsi/EsseniGKRA14","interhash":"1c187b15902d39493dc3e87273f38334","intrahash":"97f6878c79da0fd5c007eb25859741b8","journal":"IEEE Trans. VLSI Syst.","key":"journals/tvlsi/EsseniGKRA14","keywords":"dblp","number":"12","pages":"2488-2498","title":"Tunnel FETs for Ultralow Voltage Digital VLSI Circuits: Part I - Device-Circuit Interaction and Evaluation at Device Level.","type":"article","url":"http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi22.html#EsseniGKRA14","volume":"22","year":"2014","bibbaseid":"esseni-guglielmini-kapidani-rollo-alioto-tunnelfetsforultralowvoltagedigitalvlsicircuitspartidevicecircuitinteractionandevaluationatdevicelevel-2014","role":"author","urls":{"Link":"http://dx.doi.org/10.1109/TVLSI.2013.2293135","Paper":"http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi22.html#EsseniGKRA14"},"keyword":["dblp"],"downloads":0},"search_terms":["tunnel","fets","ultralow","voltage","digital","vlsi","circuits","part","device","circuit","interaction","evaluation","device","level","esseni","guglielmini","kapidani","rollo","alioto"],"keywords":["dblp"],"authorIDs":[],"dataSources":["wvAhRjakvxMweG8ZA"]}