A latency-conscious SMT branch prediction architecture. Falcón, A., Santana, O. J., Ramírez, A., & Valero, M. IJHPCN, 2(1):11-21, 2004. Paper bibtex @article{ dblp3914879,
title = {A latency-conscious SMT branch prediction architecture},
author = {Ayose Falcón and Oliverio J. Santana and Alex Ramírez and Mateo Valero},
author_short = {Falcón, A. and Santana, O. J. and Ramírez, A. and Valero, M.},
bibtype = {article},
type = {article},
year = {2004},
key = {dblp3914879},
id = {dblp3914879},
biburl = {http://www.dblp.org/rec/bibtex/journals/ijhpcn/FalconSRV04},
url = {http://dx.doi.org/10.1504/IJHPCN.2004.009264},
journal = {IJHPCN},
pages = {11-21},
number = {1},
volume = {2},
text = {IJHPCN 2(1):11-21 (2004)}
}
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