Designing a Physical Locality Aware Coherence Protocol for Chip-Multiprocessors. Fensch, C., Barrow-Williams, N., Mullins, R. D., & Moore, S. W. IEEE Trans. Computers, 62(5):914-928, 2013.
Designing a Physical Locality Aware Coherence Protocol for Chip-Multiprocessors. [link]Link  Designing a Physical Locality Aware Coherence Protocol for Chip-Multiprocessors. [link]Paper  bibtex   
@article{journals/tc/FenschBMM13,
  added-at = {2015-12-22T00:00:00.000+0100},
  author = {Fensch, Christian and Barrow-Williams, Nick and Mullins, Robert D. and Moore, Simon W.},
  biburl = {https://www.bibsonomy.org/bibtex/2d73c27af0100d6b948bb9bd761e3d536/dblp},
  ee = {http://doi.ieeecomputersociety.org/10.1109/TC.2012.52},
  interhash = {ec96a3259f8717e4df11dd9275083068},
  intrahash = {d73c27af0100d6b948bb9bd761e3d536},
  journal = {IEEE Trans. Computers},
  keywords = {dblp},
  number = 5,
  pages = {914-928},
  timestamp = {2015-12-24T12:08:31.000+0100},
  title = {Designing a Physical Locality Aware Coherence Protocol for Chip-Multiprocessors.},
  url = {http://dblp.uni-trier.de/db/journals/tc/tc62.html#FenschBMM13},
  volume = 62,
  year = 2013
}
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