The design of two easily-testable VLSI array multipliers. Ferguson, F. J. & Shen, J. P. In Rao, T. R. N. & Kornerup, P., editors, IEEE Symposium on Computer Arithmetic, pages 2-9, 1983. IEEE Computer Society.
The design of two easily-testable VLSI array multipliers. [link]Link  The design of two easily-testable VLSI array multipliers. [link]Paper  bibtex   
@inproceedings{conf/arith/FergusonS83,
  added-at = {2017-05-21T00:00:00.000+0200},
  author = {Ferguson, F. Joel and Shen, John Paul},
  biburl = {https://www.bibsonomy.org/bibtex/2af6972442f86bdc691afe3e0b2bff393/dblp},
  booktitle = {IEEE Symposium on Computer Arithmetic},
  crossref = {conf/arith/1983},
  editor = {Rao, T. R. N. and Kornerup, Peter},
  ee = {https://doi.org/10.1109/ARITH.1983.6158077},
  interhash = {f9c99279add0da4a6e8a09bd7388e95b},
  intrahash = {af6972442f86bdc691afe3e0b2bff393},
  isbn = {0-8186-0034-9},
  keywords = {dblp},
  pages = {2-9},
  publisher = {IEEE Computer Society},
  timestamp = {2019-10-17T19:28:11.000+0200},
  title = {The design of two easily-testable VLSI array multipliers.},
  url = {http://dblp.uni-trier.de/db/conf/arith/arith1983.html#FergusonS83},
  year = 1983
}

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