NeuroFPGA - Implementing Artificial Neural Networks on Programmable Logic Devices. Ferrer, D., González, R., Fleitas, R., Acle, J. P., & Canetti, R. In DATE, pages 218-223, 2004. IEEE Computer Society. Link Paper bibtex @inproceedings{conf/date/FerrerGFAC04,
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author = {Ferrer, Daniel and González, Ramiro and Fleitas, Roberto and Acle, Julio Pérez and Canetti, Rafael},
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pages = {218-223},
publisher = {IEEE Computer Society},
timestamp = {2015-11-13T12:00:36.000+0100},
title = {NeuroFPGA - Implementing Artificial Neural Networks on Programmable Logic Devices.},
url = {http://dblp.uni-trier.de/db/conf/date/date2004-df.html#FerrerGFAC04},
year = 2004
}
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