Exploring hard and soft networks-on-chip for FPGAs.

Exploring hard and soft networks-on-chip for FPGAs. Francis, R. M. & Moore, S. W. In El-Ghazawi, T. A., Chang, Y., Huang, J., & Saha, P., editors, FPT, pages 261-264, 2008. IEEE.

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Paper bibtex

@inproceedings{ conf/fpt/FrancisM08,
  added-at = {2012-11-22T00:00:00.000+0100},
  author = {Francis, Rosemary M. and Moore, Simon W.},
  biburl = {http://www.bibsonomy.org/bibtex/2b3fcc190d16f7be5eb3a4354d21eaf10/dblp},
  booktitle = {FPT},
  crossref = {conf/fpt/2008},
  editor = {El-Ghazawi, Tarek A. and Chang, Yao-Wen and Huang, Juinn-Dar and Saha, Proshanta},
  ee = {http://dx.doi.org/10.1109/FPT.2008.4762393},
  interhash = {04915a9e833ac32c8ff730aa5461c5a6},
  intrahash = {b3fcc190d16f7be5eb3a4354d21eaf10},
  isbn = {978-1-4244-2796-3},
  keywords = {dblp},
  pages = {261-264},
  publisher = {IEEE},
  title = {Exploring hard and soft networks-on-chip for FPGAs.},
  url = {http://dblp.uni-trier.de/db/conf/fpt/fpt2008.html#FrancisM08},
  year = {2008}
}

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