Hardware implementation of real-time Extreme Learning Machine in FPGA: Analysis of precision, resource occupation and performance. Francés-Víllora, J. V., Muñoz, A. R., Martínez-Villena, J. M., Bataller-Mompeán, M., Guerrero-Martínez, J., & Wegrzyn, M. Comput. Electr. Eng., 51:139–156, 2016.
Hardware implementation of real-time Extreme Learning Machine in FPGA: Analysis of precision, resource occupation and performance [link]Paper  doi  bibtex   
@article{DBLP:journals/cee/Frances-Villora16,
  author    = {Jos{\'{e}} Vicente Franc{\'{e}}s{-}V{\'{\i}}llora and
               Alfredo Rosado Mu{\~{n}}oz and
               Jos{\'{e}} M. Mart{\'{\i}}nez{-}Villena and
               Manuel Bataller{-}Mompe{\'{a}}n and
               Juan{-}Francisco Guerrero{-}Mart{\'{\i}}nez and
               Marek Wegrzyn},
  title     = {Hardware implementation of real-time Extreme Learning Machine in {FPGA:}
               Analysis of precision, resource occupation and performance},
  journal   = {Comput. Electr. Eng.},
  volume    = {51},
  pages     = {139--156},
  year      = {2016},
  url       = {https://doi.org/10.1016/j.compeleceng.2016.02.007},
  doi       = {10.1016/j.compeleceng.2016.02.007},
  timestamp = {Wed, 19 Feb 2020 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/journals/cee/Frances-Villora16.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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