Vertically-stacked double-gate nanowire FETs with controllable polarity: from devices to regular ASICs. Gaillardon, P., Amarù, L. G., Bobba, S., Marchi, M. D., Sacchetto, D., Leblebici, Y., & Micheli, G. D. In Design, Automation and Test in Europe, DATE 13, Grenoble, France, March 18-22, 2013, pages 625–630, 2013.
Paper doi bibtex @inproceedings{DBLP:conf/date/GaillardonABMSLM13,
author = {Pierre{-}Emmanuel Gaillardon and
Luca Gaetano Amar{\`{u}} and
Shashikanth Bobba and
Michele De Marchi and
Davide Sacchetto and
Yusuf Leblebici and
Giovanni De Micheli},
title = {Vertically-stacked double-gate nanowire FETs with controllable polarity:
from devices to regular ASICs},
booktitle = {Design, Automation and Test in Europe, {DATE} 13, Grenoble, France,
March 18-22, 2013},
pages = {625--630},
year = {2013},
crossref = {DBLP:conf/date/2013},
url = {https://doi.org/10.7873/DATE.2013.137},
doi = {10.7873/DATE.2013.137},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/bib/conf/date/GaillardonABMSLM13},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
Downloads: 0
{"_id":"7wo4j7ZfYu4TDXcBo","bibbaseid":"gaillardon-amar-bobba-marchi-sacchetto-leblebici-micheli-verticallystackeddoublegatenanowirefetswithcontrollablepolarityfromdevicestoregularasics-2013","authorIDs":[],"author_short":["Gaillardon, P.","Amarù, L. G.","Bobba, S.","Marchi, M. D.","Sacchetto, D.","Leblebici, Y.","Micheli, G. D."],"bibdata":{"bibtype":"inproceedings","type":"inproceedings","author":[{"firstnames":["Pierre-Emmanuel"],"propositions":[],"lastnames":["Gaillardon"],"suffixes":[]},{"firstnames":["Luca","Gaetano"],"propositions":[],"lastnames":["Amarù"],"suffixes":[]},{"firstnames":["Shashikanth"],"propositions":[],"lastnames":["Bobba"],"suffixes":[]},{"firstnames":["Michele","De"],"propositions":[],"lastnames":["Marchi"],"suffixes":[]},{"firstnames":["Davide"],"propositions":[],"lastnames":["Sacchetto"],"suffixes":[]},{"firstnames":["Yusuf"],"propositions":[],"lastnames":["Leblebici"],"suffixes":[]},{"firstnames":["Giovanni","De"],"propositions":[],"lastnames":["Micheli"],"suffixes":[]}],"title":"Vertically-stacked double-gate nanowire FETs with controllable polarity: from devices to regular ASICs","booktitle":"Design, Automation and Test in Europe, DATE 13, Grenoble, France, March 18-22, 2013","pages":"625–630","year":"2013","crossref":"DBLP:conf/date/2013","url":"https://doi.org/10.7873/DATE.2013.137","doi":"10.7873/DATE.2013.137","timestamp":"Wed, 16 Oct 2019 14:14:53 +0200","biburl":"https://dblp.org/rec/bib/conf/date/GaillardonABMSLM13","bibsource":"dblp computer science bibliography, https://dblp.org","bibtex":"@inproceedings{DBLP:conf/date/GaillardonABMSLM13,\n author = {Pierre{-}Emmanuel Gaillardon and\n Luca Gaetano Amar{\\`{u}} and\n Shashikanth Bobba and\n Michele De Marchi and\n Davide Sacchetto and\n Yusuf Leblebici and\n Giovanni De Micheli},\n title = {Vertically-stacked double-gate nanowire FETs with controllable polarity:\n from devices to regular ASICs},\n booktitle = {Design, Automation and Test in Europe, {DATE} 13, Grenoble, France,\n March 18-22, 2013},\n pages = {625--630},\n year = {2013},\n crossref = {DBLP:conf/date/2013},\n url = {https://doi.org/10.7873/DATE.2013.137},\n doi = {10.7873/DATE.2013.137},\n timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},\n biburl = {https://dblp.org/rec/bib/conf/date/GaillardonABMSLM13},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n","author_short":["Gaillardon, P.","Amarù, L. G.","Bobba, S.","Marchi, M. D.","Sacchetto, D.","Leblebici, Y.","Micheli, G. D."],"key":"DBLP:conf/date/GaillardonABMSLM13","id":"DBLP:conf/date/GaillardonABMSLM13","bibbaseid":"gaillardon-amar-bobba-marchi-sacchetto-leblebici-micheli-verticallystackeddoublegatenanowirefetswithcontrollablepolarityfromdevicestoregularasics-2013","role":"author","urls":{"Paper":"https://doi.org/10.7873/DATE.2013.137"},"downloads":0,"html":""},"bibtype":"inproceedings","biburl":"https://ycunxi.github.io/utah-csl/bibtex/all.bib","creationDate":"2019-11-14T21:28:28.410Z","downloads":0,"keywords":[],"search_terms":["vertically","stacked","double","gate","nanowire","fets","controllable","polarity","devices","regular","asics","gaillardon","amarù","bobba","marchi","sacchetto","leblebici","micheli"],"title":"Vertically-stacked double-gate nanowire FETs with controllable polarity: from devices to regular ASICs","year":2013,"dataSources":["L6BLFSB28hKk5Nt67"]}