Towards structured ASICs using polarity-tunable Si nanowire transistors. Gaillardon, P., Marchi, M. D., Amarù, L. G., Bobba, S., Sacchetto, D., Leblebici, Y., & Micheli, G. D. In The 50th Annual Design Automation Conference 2013, DAC '13, Austin, TX, USA, May 29 - June 07, 2013, pages 123:1–123:4, 2013.
Towards structured ASICs using polarity-tunable Si nanowire transistors [link]Paper  doi  bibtex   
@inproceedings{DBLP:conf/dac/GaillardonMABSLM13,
  author    = {Pierre{-}Emmanuel Gaillardon and
               Michele De Marchi and
               Luca Gaetano Amar{\`{u}} and
               Shashikanth Bobba and
               Davide Sacchetto and
               Yusuf Leblebici and
               Giovanni De Micheli},
  title     = {Towards structured ASICs using polarity-tunable Si nanowire transistors},
  booktitle = {The 50th Annual Design Automation Conference 2013, {DAC} '13, Austin,
               TX, USA, May 29 - June 07, 2013},
  pages     = {123:1--123:4},
  year      = {2013},
  crossref  = {DBLP:conf/dac/2013},
  url       = {https://doi.org/10.1145/2463209.2488886},
  doi       = {10.1145/2463209.2488886},
  timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/bib/conf/dac/GaillardonMABSLM13},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

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