Challenges in Implementing Cache-Based Side Channel Attacks on Modern Processors. Gajrani, J., Mazumdar, P., Sharma, S. A., & Menezes, B. In VLSI Design, pages 222-227, 2014. IEEE Computer Society.
Challenges in Implementing Cache-Based Side Channel Attacks on Modern Processors. [link]Link  Challenges in Implementing Cache-Based Side Channel Attacks on Modern Processors. [link]Paper  bibtex   
@inproceedings{ conf/vlsid/GajraniMSM14,
  added-at = {2015-04-20T00:00:00.000+0200},
  author = {Gajrani, Jyoti and Mazumdar, Pooja and Sharma, Sampreet A. and Menezes, Bernard},
  biburl = {http://www.bibsonomy.org/bibtex/28b032a35b587a870024915465e9398c6/dblp},
  booktitle = {VLSI Design},
  crossref = {conf/vlsid/2014},
  ee = {http://doi.ieeecomputersociety.org/10.1109/VLSID.2014.45},
  interhash = {2bdabab3519cee59152c7524de624635},
  intrahash = {8b032a35b587a870024915465e9398c6},
  isbn = {978-1-4799-2513-1},
  keywords = {dblp},
  pages = {222-227},
  publisher = {IEEE Computer Society},
  title = {Challenges in Implementing Cache-Based Side Channel Attacks on Modern Processors.},
  url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2014.html#GajraniMSM14},
  year = {2014}
}

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