Structural Fault Modelling in Nano Devices. Gaur, M. S., Narasimhan, R., Laxmi, V., & Kumar, U. In Nano-Net - Third International ICST Conference, NanoNet 2008, Boston, MA, USA, September 14-16, 2008, Revised Selected Papers, pages 6–10, 2008.
Structural Fault Modelling in Nano Devices [link]Paper  doi  bibtex   
@inproceedings{DBLP:conf/nanonet/GaurNLK08,
  author       = {Manoj Singh Gaur and
                  Raghavendra Narasimhan and
                  Vijay Laxmi and
                  Ujjwal Kumar},
  title        = {Structural Fault Modelling in Nano Devices},
  booktitle    = {Nano-Net - Third International {ICST} Conference, NanoNet 2008, Boston,
                  MA, USA, September 14-16, 2008, Revised Selected Papers},
  pages        = {6--10},
  year         = {2008},
  crossref     = {DBLP:conf/nanonet/2008},
  url          = {https://doi.org/10.1007/978-3-642-02427-6\_2},
  doi          = {10.1007/978-3-642-02427-6\_2},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/nanonet/GaurNLK08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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