{"_id":"pzcyRJTbdPPLhihRJ","bibbaseid":"george-venugopalan-designandperformancemeasurementofahighperformancecomputingcluster-2012","author_short":["George, K.","Venugopalan, V."],"bibdata":{"bibtype":"inproceedings","type":"inproceedings","abstract":"Graphics processor units (GPU) are specialized hardware accelerators that can be utilized for computations needing high parallelism and high memory bandwidth. Propelled by the attractive Flops/$ ratio and its capability to outperform a CPU cluster at the equivalent cost, large-scale GPU clusters are gaining popularity in the high-performance computing (HPC) community. However, the design challenges associated with the setup and application development process for an efficient HPC cluster includes: a) data movement and locality on the hardware accelerators; b) task mapping and allocation; and c) setting up a well-balanced system. In this paper, we present our experience setting up a GPU cluster for HPC applications; particularly signal processing for digital wideband receivers. We describe the architecture, hardware and software platform of the proposed cluster. The proposed GPU cluster implementing a 1.25 GHz digital wideband receiver was compared and contrasted against a HPC based predecessor receiver system. The adaptability of the GPU cluster was further demonstrated by utilizing it for a multiple receiver implementation that demanded higher data processing capability and throughput.","author":[{"propositions":[],"lastnames":["George"],"firstnames":["Kiran"],"suffixes":[]},{"propositions":[],"lastnames":["Venugopalan"],"firstnames":["Vivek"],"suffixes":[]}],"booktitle":"IEEE International Instrumentation and Measurement Technology Conference (I2MTC)","date-added":"2020-01-15 12:02:05 -0500","date-modified":"2020-01-15 12:02:05 -0500","issn":"1091-5281","month":"May","pages":"2531 -2536","title":"Design and Performance Measurement of a High-Performance Computing Cluster","year":"2012","bdsk-file-1":"YnBsaXN0MDDSAQIDBFxyZWxhdGl2ZVBhdGhZYWxpYXNEYXRhXxAtLi4vLi4vcmVmZXJlbmNlcy9QREYvR2VvcmdlMjAxMkRlc2lnbi1hbmQucGRmTxEBhAAAAAABhAACAAAMTWFjaW50b3NoIEhEAAAAAAAAAAAAAAAAAAAAAAAAAEJEAAH/////GEdlb3JnZTIwMTJEZXNpZ24tYW5kLnBkZgAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAP////8AAAAAAAAAAAAAAAAAAgADAAAKIGN1AAAAAAAAAAAAAAAAAANQREYAAAIAPi86VXNlcnM6dml2ZWt2OkRyb3Bib3g6cmVmZXJlbmNlczpQREY6R2VvcmdlMjAxMkRlc2lnbi1hbmQucGRmAA4AMgAYAEcAZQBvAHIAZwBlADIAMAAxADIARABlAHMAaQBnAG4ALQBhAG4AZAAuAHAAZABmAA8AGgAMAE0AYQBjAGkAbgB0AG8AcwBoACAASABEABIAPFVzZXJzL3ZpdmVrdi9Ecm9wYm94L3JlZmVyZW5jZXMvUERGL0dlb3JnZTIwMTJEZXNpZ24tYW5kLnBkZgATAAEvAAAVAAIADf//AAAACAANABoAJABUAAAAAAAAAgEAAAAAAAAABQAAAAAAAAAAAAAAAAAAAdw=","bdsk-url-1":"http://dx.doi.org/10.1109/I2MTC.2012.6229359","bibtex":"@inproceedings{George2012Design-and,\n\tabstract = {Graphics processor units (GPU) are specialized hardware accelerators that can be utilized for computations needing high parallelism and high memory bandwidth. Propelled by the attractive Flops/$ ratio and its capability to outperform a CPU cluster at the equivalent cost, large-scale GPU clusters are gaining popularity in the high-performance computing (HPC) community. However, the design challenges associated with the setup and application development process for an efficient HPC cluster includes: a) data movement and locality on the hardware accelerators; b) task mapping and allocation; and c) setting up a well-balanced system. In this paper, we present our experience setting up a GPU cluster for HPC applications; particularly signal processing for digital wideband receivers. We describe the architecture, hardware and software platform of the proposed cluster. The proposed GPU cluster implementing a 1.25 GHz digital wideband receiver was compared and contrasted against a HPC based predecessor receiver system. The adaptability of the GPU cluster was further demonstrated by utilizing it for a multiple receiver implementation that demanded higher data processing capability and throughput.},\n\tauthor = {George, Kiran and Venugopalan, Vivek},\n\tbooktitle = {IEEE International Instrumentation and Measurement Technology Conference (I2MTC)},\n\tdate-added = {2020-01-15 12:02:05 -0500},\n\tdate-modified = {2020-01-15 12:02:05 -0500},\n\tissn = {1091-5281},\n\tmonth = may,\n\tpages = {2531 -2536},\n\ttitle = {Design and Performance Measurement of a High-Performance Computing Cluster},\n\tyear = {2012},\n\tBdsk-File-1 = {YnBsaXN0MDDSAQIDBFxyZWxhdGl2ZVBhdGhZYWxpYXNEYXRhXxAtLi4vLi4vcmVmZXJlbmNlcy9QREYvR2VvcmdlMjAxMkRlc2lnbi1hbmQucGRmTxEBhAAAAAABhAACAAAMTWFjaW50b3NoIEhEAAAAAAAAAAAAAAAAAAAAAAAAAEJEAAH/////GEdlb3JnZTIwMTJEZXNpZ24tYW5kLnBkZgAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAP////8AAAAAAAAAAAAAAAAAAgADAAAKIGN1AAAAAAAAAAAAAAAAAANQREYAAAIAPi86VXNlcnM6dml2ZWt2OkRyb3Bib3g6cmVmZXJlbmNlczpQREY6R2VvcmdlMjAxMkRlc2lnbi1hbmQucGRmAA4AMgAYAEcAZQBvAHIAZwBlADIAMAAxADIARABlAHMAaQBnAG4ALQBhAG4AZAAuAHAAZABmAA8AGgAMAE0AYQBjAGkAbgB0AG8AcwBoACAASABEABIAPFVzZXJzL3ZpdmVrdi9Ecm9wYm94L3JlZmVyZW5jZXMvUERGL0dlb3JnZTIwMTJEZXNpZ24tYW5kLnBkZgATAAEvAAAVAAIADf//AAAACAANABoAJABUAAAAAAAAAgEAAAAAAAAABQAAAAAAAAAAAAAAAAAAAdw=},\n\tBdsk-Url-1 = {http://dx.doi.org/10.1109/I2MTC.2012.6229359}}\n\n","author_short":["George, K.","Venugopalan, V."],"bibbaseid":"george-venugopalan-designandperformancemeasurementofahighperformancecomputingcluster-2012","role":"author","urls":{},"metadata":{"authorlinks":{}}},"bibtype":"inproceedings","biburl":"https://bibbase.org/f/R3LGkkqj3uPfqr3NM/vivekv-isi-edu.bib","dataSources":["i5A8jKqyW67R7nn75","oodiEqv3HQNeZtGeC"],"keywords":[],"search_terms":["design","performance","measurement","high","performance","computing","cluster","george","venugopalan"],"title":"Design and Performance Measurement of a High-Performance Computing Cluster","year":2012}