Low-power multiplexer designs using three-independent-gate field effect transistors

Low-power multiplexer designs using three-independent-gate field effect transistors. Giacomin, E., Gonzalez, J. R., & Gaillardon, P. In IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2017, Newport, RI, USA, July 25-26, 2017, pages 33–38, 2017.

Paper doi bibtex

@inproceedings{DBLP:conf/nanoarch/GiacominGG17,
  author    = {Edouard Giacomin and
               Jorge Romero Gonzalez and
               Pierre{-}Emmanuel Gaillardon},
  title     = {Low-power multiplexer designs using three-independent-gate field effect
               transistors},
  booktitle = {{IEEE/ACM} International Symposium on Nanoscale Architectures, {NANOARCH}
               2017, Newport, RI, USA, July 25-26, 2017},
  pages     = {33--38},
  year      = {2017},
  crossref  = {DBLP:conf/nanoarch/2017},
  url       = {https://doi.org/10.1109/NANOARCH.2017.8053723},
  doi       = {10.1109/NANOARCH.2017.8053723},
  timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/nanoarch/GiacominGG17},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

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