@inproceedings{conf/itc/GoelAWCHMLCKVMSCLCK13,
  added-at = {2015-08-26T00:00:00.000+0200},
  author = {Goel, Sandeep Kumar and Adham, Saman and Wang, Min-Jer and Chen, Ji-Jan and Huang, Tze-Chiang and Mehta, Ashok and Lee, Frank and Chickermane, Vivek and Keller, Brion L. and Valind, Thomas and Mukherjee, Subhasish and Sood, Navdeep and Cho, Jeongho and Lee, Hayden Hyungdong and Choi, Jungi and Kim, Sangdoo},
  biburl = {http://www.bibsonomy.org/bibtex/27acfccd5f46d86be2d9b1de8f457b7a9/dblp},
  booktitle = {ITC},
  crossref = {conf/itc/2013},
  ee = {http://doi.ieeecomputersociety.org/10.1109/TEST.2013.6651893},
  interhash = {adc4113959bfd366ed21bbd946899749},
  intrahash = {7acfccd5f46d86be2d9b1de8f457b7a9},
  isbn = {978-1-4799-0859-2},
  keywords = {dblp},
  pages = {1-10},
  publisher = {IEEE Computer Society},
  timestamp = {2015-08-29T11:52:05.000+0200},
  title = {Test and debug strategy for TSMC CoWoS™ stacking process based heterogeneous 3D IC: A silicon case study.},
  url = {http://dblp.uni-trier.de/db/conf/itc/itc2013.html#GoelAWCHMLCKVMSCLCK13},
  year = 2013
}

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