Automatic layout generation of power MOSFET transistors in bulk CMOS. Guilherme, D., Horta, N., & Guilherme, J. In Proceedings of International Conference on Environmental and Computer Science (ICECS), pages 606-609, 2014.
Automatic layout generation of power MOSFET transistors in bulk CMOS [link]Paper  bibtex   
@inproceedings{ dblp1714667,
  title = {Automatic layout generation of power MOSFET transistors in bulk CMOS},
  author = {David Guilherme and Nuno Horta and Jorge Guilherme},
  author_short = {Guilherme, D. and Horta, N. and Guilherme, J.},
  bibtype = {inproceedings},
  type = {inproceedings},
  year = {2014},
  key = {dblp1714667},
  id = {dblp1714667},
  biburl = {http://www.dblp.org/rec/bibtex/conf/icecsys/GuilhermeHG14},
  url = {http://dx.doi.org/10.1109/ICECS.2014.7050058},
  conference = {ICECS},
  pages = {606-609},
  text = {ICECS 2014:606-609},
  booktitle = {Proceedings of International Conference on Environmental and Computer Science (ICECS)}
}

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