RapidStream: Parallel Physical Implementation of FPGA HLS Designs. Guo, L., Maidee, P., Zhou, Y., Lavin, C., Wang, J., Chi, Y., Qiao, W., Kaviani, A., Zhang, Z., & Cong, J. In Adler, M. & Ienne, P., editors, FPGA, pages 1-12, 2022. ACM.
RapidStream: Parallel Physical Implementation of FPGA HLS Designs. [link]Link  RapidStream: Parallel Physical Implementation of FPGA HLS Designs. [link]Paper  bibtex   
@inproceedings{conf/fpga/GuoMZ00CQKZC22,
  added-at = {2025-01-19T00:00:00.000+0100},
  author = {Guo, Licheng and Maidee, Pongstorn and Zhou, Yun and Lavin, Chris and Wang, Jie and Chi, Yuze and Qiao, Weikang and Kaviani, Alireza and Zhang, Zhiru and Cong, Jason},
  biburl = {https://www.bibsonomy.org/bibtex/2d6af367ceab7479ba7e95a2a9c0704fe/dblp},
  booktitle = {FPGA},
  crossref = {conf/fpga/2022},
  editor = {Adler, Michael and Ienne, Paolo},
  ee = {https://www.wikidata.org/entity/Q130827390},
  interhash = {f57766b654e3bb9fdf061e0a73b9c12c},
  intrahash = {d6af367ceab7479ba7e95a2a9c0704fe},
  isbn = {978-1-4503-9149-8},
  keywords = {dblp},
  pages = {1-12},
  publisher = {ACM},
  timestamp = {2025-01-27T10:54:20.000+0100},
  title = {RapidStream: Parallel Physical Implementation of FPGA HLS Designs.},
  url = {http://dblp.uni-trier.de/db/conf/fpga/fpga2022.html#GuoMZ00CQKZC22},
  year = 2022
}

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