7-nm FinFET CMOS Design Enabled by Stress Engineering Using Si, Ge, and Sn. Gupta, S., Moroz, V., Smith, L., Lu, Q., & Saraswat, K‥ Electron Devices, IEEE Transactions on, 61(5):1222-1230, May, 2014. ![7-nm FinFET CMOS Design Enabled by Stress Engineering Using Si, Ge, and Sn [link]](https://bibbase.org/img/filetypes/link.svg "link")
Paper doi abstract bibtex Bandgap and stress engineering using group IV materials—Si, Ge, and Sn, and their alloys are employed to design a FinFET-based CMOS solution for the 7-nm technology node and beyond. A detailed simulation study evaluating the performance of the proposed design is presented. Through the use of a common strain-relaxed buffer layer for p- and n-channel MOSFETs and a careful selection of source/drain stressor materials, the CMOS design is shown to achieve performance benefits over strained Si, meet the $I_rm OFF$ requirements, and provide a path for continued technology scaling.
@article{ 6781615,
abstract = {Bandgap and stress engineering using group IV materials—Si, Ge, and Sn, and their alloys are employed to design a FinFET-based CMOS solution for the 7-nm technology node and beyond. A detailed simulation study evaluating the performance of the proposed design is presented. Through the use of a common strain-relaxed buffer layer for p- and n-channel MOSFETs and a careful selection of source/drain stressor materials, the CMOS design is shown to achieve performance benefits over strained Si, meet the <inline-formula> <tex-math notation="TeX">$I_{{rm OFF}}$ </tex-math></inline-formula> requirements, and provide a path for continued technology scaling.},
added-at = {2014-04-30T16:59:34.000+0200},
author = {Gupta, S. and Moroz, V. and Smith, L. and Lu, Q. and Saraswat, K.C.},
biburl = {http://www.bibsonomy.org/bibtex/2e8d10dbbc20eeeb625aedb2ba616ba37/maldegunde},
description = {IEEE Xplore Abstract - 7-nm FinFET CMOS Design Enabled by Stress Engineering Using Si, Ge, and Sn},
doi = {10.1109/TED.2014.2311129},
interhash = {c0c8456064e7a2e9cb96cfcd79c2ddf6},
intrahash = {e8d10dbbc20eeeb625aedb2ba616ba37},
issn = {0018-9383},
journal = {Electron Devices, IEEE Transactions on},
keywords = {7nm cmos design finfet},
month = {May},
number = {5},
pages = {1222-1230},
title = {7-nm FinFET CMOS Design Enabled by Stress Engineering Using Si, Ge, and Sn},
url = {http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6781615&sortType%3Dasc_p_Sequence%26filter%3DAND%28p_IS_Number%3A6802373%29},
volume = {61},
year = {2014}
}
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