A Fast Partitioning Method for PLA-Based FPGAs. Hasan, Z., Harrison, D., & Ciesielski, M. J. IEEE Design & Test of Computers, 9(4):34-39, 1992.
A Fast Partitioning Method for PLA-Based FPGAs. [link]Link  A Fast Partitioning Method for PLA-Based FPGAs. [link]Paper  bibtex   
@article{journals/dt/HasanHC92,
  added-at = {2016-03-09T00:00:00.000+0100},
  author = {Hasan, Zafar and Harrison, David and Ciesielski, Maciej J.},
  biburl = {https://www.bibsonomy.org/bibtex/246f10ae23e4b8cae39a46232d8d795b6/dblp},
  ee = {http://doi.ieeecomputersociety.org/10.1109/54.173331},
  interhash = {1ae7aa206a7db50d4eedd5019a810866},
  intrahash = {46f10ae23e4b8cae39a46232d8d795b6},
  journal = {IEEE Design & Test of Computers},
  keywords = {dblp},
  number = 4,
  pages = {34-39},
  timestamp = {2016-03-10T16:34:06.000+0100},
  title = {A Fast Partitioning Method for PLA-Based FPGAs.},
  url = {http://dblp.uni-trier.de/db/journals/dt/dt9.html#HasanHC92},
  volume = 9,
  year = 1992
}

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