A digitally controlled CMOS RF power amplifier. Hella, M. & Ismail, M. Midwest Symposium on Circuits and Systems, 2001.
abstract   bibtex   
This paper presents the design, and implementation of an RF power amplifier in a standard 0.35 μm CMOS technology. The amplifier is capable of delivering 16.5dBm of output power at 1.85GHz using a 3.3V supply with an overall measured power added efficiency (PAE) of 30%. The power amplifier employs a class AB output stage, which represents a compromise between efficiency and linearity. Measurement results of the fabricated chip are included.
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 title = {A digitally controlled CMOS RF power amplifier},
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 year = {2001},
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 abstract = {This paper presents the design, and implementation of an RF power amplifier in a standard 0.35 μm CMOS technology. The amplifier is capable of delivering 16.5dBm of output power at 1.85GHz using a 3.3V supply with an overall measured power added efficiency (PAE) of 30%. The power amplifier employs a class AB output stage, which represents a compromise between efficiency and linearity. Measurement results of the fabricated chip are included.},
 bibtype = {article},
 author = {Hella, M.M. and Ismail, M.},
 journal = {Midwest Symposium on Circuits and Systems}
}
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