Full-Chip Model for Leakage-Current Estimation Considering Within-Die Correlation. Heloue, K. R., Azizi, N., & Najm, F. N. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 28(6):874-887, 2009.
Full-Chip Model for Leakage-Current Estimation Considering Within-Die Correlation. [link]Link  Full-Chip Model for Leakage-Current Estimation Considering Within-Die Correlation. [link]Paper  bibtex   
@article{journals/tcad/HeloueAN09,
  added-at = {2020-09-24T00:00:00.000+0200},
  author = {Heloue, Khaled R. and Azizi, Navid and Najm, Farid N.},
  biburl = {https://www.bibsonomy.org/bibtex/28fa33d0208cca9fde056a15048898052/dblp},
  ee = {https://doi.org/10.1109/TCAD.2009.2016546},
  interhash = {acf4741ea2123ce81b4fd29890c406a8},
  intrahash = {8fa33d0208cca9fde056a15048898052},
  journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.},
  keywords = {dblp},
  number = 6,
  pages = {874-887},
  timestamp = {2020-09-25T11:45:35.000+0200},
  title = {Full-Chip Model for Leakage-Current Estimation Considering Within-Die Correlation.},
  url = {http://dblp.uni-trier.de/db/journals/tcad/tcad28.html#HeloueAN09},
  volume = 28,
  year = 2009
}

Downloads: 0