FPGA-Based Track Circuit for Railways Using Transmission Encoding. Hernández, Á., del Carmen Pérez, M., García, J. J., Jiménez, A., García, J. C. G., Espinosa, F., Mazo, M., & Ureña, J. IEEE Trans. Intelligent Transportation Systems, 13(2):437-448, 2012.
FPGA-Based Track Circuit for Railways Using Transmission Encoding. [link]Link  FPGA-Based Track Circuit for Railways Using Transmission Encoding. [link]Paper  bibtex   
@article{journals/tits/HernandezPGJGEMU12,
  added-at = {2016-03-09T00:00:00.000+0100},
  author = {Hernández, Álvaro and del Carmen Pérez, María and García, Juan Jesús and Jiménez, Ana and García, Juan Carlos García and Espinosa, Felipe and Mazo, Manuel and Ureña, Jesús},
  biburl = {http://www.bibsonomy.org/bibtex/221fbf4d847d94f36a6832a63fe34a889/dblp},
  ee = {http://dx.doi.org/10.1109/TITS.2011.2170976},
  interhash = {2f46dc900910338190ba3a093639bcd4},
  intrahash = {21fbf4d847d94f36a6832a63fe34a889},
  journal = {IEEE Trans. Intelligent Transportation Systems},
  keywords = {dblp},
  number = 2,
  pages = {437-448},
  timestamp = {2016-03-10T17:43:11.000+0100},
  title = {FPGA-Based Track Circuit for Railways Using Transmission Encoding.},
  url = {http://dblp.uni-trier.de/db/journals/tits/tits13.html#HernandezPGJGEMU12},
  volume = 13,
  year = 2012
}

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