Efficient development of cycle time response surfaces using progressive simulation metamodeling. Hsieh, L. Y., Chang, K., & Chien, C. International Journal of Production Research, 52(10):3097-3109, Taylor & Francis, 2014.
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In semiconductor manufacturing, hot lots are to provide marketing and engineering with extra flexibility regarding delivery lead times, and in turn enhance its competitive advantages against other companies. On the other hand, hot lots are among major sources of disruption of the smoothness of the manufacturing flow. They can lead to a significant increase of cycle time of normal lots, and in turn result in delayed delivery times and serious service deteriorations. Due to the complex nature of semiconductor manufacturing, evaluating the impact of hot lots on the cycle time of normal lots presents major challenges. In this paper, we propose a methodology, called progressive simulation metamodelling (PSM), that allows for an efficient development of the response surface between the cycle time of normal lots and the percentage of hot lots in semiconductor manufacturing. The response surface generated by the proposed PSM is like an easy-to-use analytical model, but with the fidelity of simulation that takes into account all important manufacturing details. The specially-designed mechanisms, including identifying the critical region and sequentially adding design points in the critical region, further grants PSM computational advantages compared to the traditional response surface method. An empirical study conducted in collaboration with a semiconductor company validates the viability of PSM in real settings.
@article{Hsieh2014IJPR,
  title={Efficient development of cycle time response surfaces using progressive simulation
  metamodeling},
  author={Liam Y. Hsieh and Kuo-Hao Chang and Chen-Fu Chien},
  journal={International Journal of Production Research},
  volume={52},
  number={10},
  pages={3097-3109},
  year={2014},
  abstract={In semiconductor manufacturing, hot lots are to provide marketing and engineering with extra flexibility regarding delivery lead times, and in turn enhance its competitive advantages against other companies. On the other hand, hot lots are among major sources of disruption of the smoothness of the manufacturing flow. They can lead to a significant increase of cycle time of normal lots, and in turn result in delayed delivery times and serious service deteriorations. Due to the complex nature of semiconductor manufacturing, evaluating the impact of hot lots on the cycle time of normal lots presents major challenges. In this paper, we propose a methodology, called progressive simulation metamodelling (PSM), that allows for an efficient development of the response surface between the cycle time of normal lots and the percentage of hot lots in semiconductor manufacturing. The response surface generated by the proposed PSM is like an easy-to-use analytical model, but with the fidelity of simulation that takes into account all important manufacturing details. The specially-designed mechanisms, including identifying the critical region and sequentially adding design points in the critical region, further grants PSM computational advantages compared to the traditional response surface method. An empirical study conducted in collaboration with a semiconductor company validates the viability of PSM in real settings.},
  doi={10.1080/00207543.2013.864055},
  publisher={Taylor \& Francis}
}

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