An All-Analog Method to Enhance Amplitude Stability in Pierce Crystal Oscillators. Hussein, K. & Hegazi, E. IEEE Transactions on Circuits and Systems I: Regular Papers, 59(3):463–470, March, 2012. doi abstract bibtex This work proposes a simple method to enhance amplitude stability in Pierce crystal oscillator. The method is based on a modification of the conventional Pierce oscillator. The pro- posed topology is all-analog, yet it does not use an amplifier-based feedback loop for amplitude control, hence, it saves power, reduces complexity, and layout area. The proposed method does not adversely impact oscillator's phase noise, and gives good amplitude control results against process, voltage, and temperature (PVT) variations. An example design for a 40 MHz Pierce crystal oscillator is implemented in a standard 0.13 μm CMOS technology and compared to conventional Pierce oscillator results. The current consumption of the oscillator core is 500 μA off 1.2 V supply. The proposed method is extensible to other CMOS VCOs, including Giga-Hertz ones, to reduce design margins on VCO gain.
@article{hussein_all-analog_2012,
title = {An {All}-{Analog} {Method} to {Enhance} {Amplitude} {Stability} in {Pierce} {Crystal} {Oscillators}},
volume = {59},
issn = {1549-8328},
doi = {10.1109/TCSI.2011.2167270},
abstract = {This work proposes a simple method to enhance amplitude stability in Pierce crystal oscillator. The method is based on a modification of the conventional Pierce oscillator. The pro- posed topology is all-analog, yet it does not use an amplifier-based feedback loop for amplitude control, hence, it saves power, reduces complexity, and layout area. The proposed method does not adversely impact oscillator's phase noise, and gives good amplitude control results against process, voltage, and temperature (PVT) variations. An example design for a 40 MHz Pierce crystal oscillator is implemented in a standard 0.13 μm CMOS technology and compared to conventional Pierce oscillator results. The current consumption of the oscillator core is 500 μA off 1.2 V supply. The proposed method is extensible to other CMOS VCOs, including Giga-Hertz ones, to reduce design margins on VCO gain.},
number = {3},
journal = {IEEE Transactions on Circuits and Systems I: Regular Papers},
author = {Hussein, K.M. and Hegazi, E.},
month = mar,
year = {2012},
pages = {463--470}
}
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