The chip. Ismail, M., Tan, N., Dhaou, I., & Tenhunen, H. IEEE Circuits and Devices Magazine, 2003.
abstract   bibtex   
Several techniques used in interconnect modeling are described. It focuses on the efficient modeling of on-chip wires, investigates the impact of inductive and capacitive coupling on the quality of the signal and the wire-load model, and contains a quantification of the impact of the wire model on the design of efficient signaling techniques. It is found that the absence of coupling, driver resistance and loading capacitance could decrease the impact of on-chip inductance compared with the undriven case.
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 title = {The chip},
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 year = {2003},
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 abstract = {Several techniques used in interconnect modeling are described. It focuses on the efficient modeling of on-chip wires, investigates the impact of inductive and capacitive coupling on the quality of the signal and the wire-load model, and contains a quantification of the impact of the wire model on the design of efficient signaling techniques. It is found that the absence of coupling, driver resistance and loading capacitance could decrease the impact of on-chip inductance compared with the undriven case.},
 bibtype = {article},
 author = {Ismail, M. and Tan, N. and Dhaou, I.B. and Tenhunen, H.},
 journal = {IEEE Circuits and Devices Magazine},
 number = {1}
}

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