@inproceedings{DBLP:conf/ispass/Iyer03,
  author    = {Ravishankar K. Iyer},
  title     = {Performance implications of chipset caches in web servers},
  booktitle = {2003 {IEEE} International Symposium on Performance Analysis of Systems
               and Software, March 6-8, 2003, Austin, Texas, USA, Proceedings},
  pages     = {176--185},
  year      = {2003},
  crossref  = {DBLP:conf/ispass/2003},
  url       = {https://doi.org/10.1109/ISPASS.2003.1190244},
  doi       = {10.1109/ISPASS.2003.1190244},
  timestamp = {Tue, 23 May 2017 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/ispass/Iyer03},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

{"_id":"ni5t28ZpFLva633cs","bibbaseid":"iyer-performanceimplicationsofchipsetcachesinwebservers-2003","downloads":0,"creationDate":"2018-12-15T20:25:17.303Z","title":"Performance implications of chipset caches in web servers","author_short":["Iyer, R. K."],"year":2003,"bibtype":"inproceedings","biburl":"https://dblp.org/pid/i/RavishankarKIyer.bib","bibdata":{"bibtype":"inproceedings","type":"inproceedings","author":[{"firstnames":["Ravishankar","K."],"propositions":[],"lastnames":["Iyer"],"suffixes":[]}],"title":"Performance implications of chipset caches in web servers","booktitle":"2003 IEEE International Symposium on Performance Analysis of Systems and Software, March 6-8, 2003, Austin, Texas, USA, Proceedings","pages":"176–185","year":"2003","crossref":"DBLP:conf/ispass/2003","url":"https://doi.org/10.1109/ISPASS.2003.1190244","doi":"10.1109/ISPASS.2003.1190244","timestamp":"Tue, 23 May 2017 01:00:00 +0200","biburl":"https://dblp.org/rec/bib/conf/ispass/Iyer03","bibsource":"dblp computer science bibliography, https://dblp.org","bibtex":"@inproceedings{DBLP:conf/ispass/Iyer03,\n author = {Ravishankar K. Iyer},\n title = {Performance implications of chipset caches in web servers},\n booktitle = {2003 {IEEE} International Symposium on Performance Analysis of Systems\n and Software, March 6-8, 2003, Austin, Texas, USA, Proceedings},\n pages = {176--185},\n year = {2003},\n crossref = {DBLP:conf/ispass/2003},\n url = {https://doi.org/10.1109/ISPASS.2003.1190244},\n doi = {10.1109/ISPASS.2003.1190244},\n timestamp = {Tue, 23 May 2017 01:00:00 +0200},\n biburl = {https://dblp.org/rec/bib/conf/ispass/Iyer03},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n","author_short":["Iyer, R. K."],"key":"DBLP:conf/ispass/Iyer03","id":"DBLP:conf/ispass/Iyer03","bibbaseid":"iyer-performanceimplicationsofchipsetcachesinwebservers-2003","role":"author","urls":{"Paper":"https://doi.org/10.1109/ISPASS.2003.1190244"},"downloads":0},"search_terms":["performance","implications","chipset","caches","web","servers","iyer"],"keywords":[],"authorIDs":[],"dataSources":["oReyvN2rDfSfvMRG3"]}