Automatic efficient data layout for multithreaded stencil codes on CPU sand GPUs. Jaeger, J. & Barthou, D. In 19th International Conference on High Performance Computing, HiPC 2012, Pune, India, December 18-22, 2012, pages 1–10, 2012. IEEE Computer Society.
Automatic efficient data layout for multithreaded stencil codes on CPU sand GPUs [link]Paper  doi  bibtex   
@inproceedings{DBLP:conf/hipc/JaegerB12,
  author       = {Julien Jaeger and
                  Denis Barthou},
  title        = {Automatic efficient data layout for multithreaded stencil codes on
                  {CPU} sand GPUs},
  booktitle    = {19th International Conference on High Performance Computing, HiPC
                  2012, Pune, India, December 18-22, 2012},
  pages        = {1--10},
  publisher    = {{IEEE} Computer Society},
  year         = {2012},
  url          = {https://doi.org/10.1109/HiPC.2012.6507504},
  doi          = {10.1109/HIPC.2012.6507504},
  timestamp    = {Sun, 06 Oct 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/hipc/JaegerB12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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