Conductance Modulation Techniques in Switched-Capacitor DC-DC Converter for Maximum-Efficiency Tracking and Ripple Mitigation in 22 nm Tri-Gate CMOS. Jain, R., Kim, S. T., Vaidya, V. A., Ravichandran, K., Tschanz, J. W., & De, V. J. Solid-State Circuits, 50(8):1809-1819, 2015.
Conductance Modulation Techniques in Switched-Capacitor DC-DC Converter for Maximum-Efficiency Tracking and Ripple Mitigation in 22 nm Tri-Gate CMOS. [link]Link  Conductance Modulation Techniques in Switched-Capacitor DC-DC Converter for Maximum-Efficiency Tracking and Ripple Mitigation in 22 nm Tri-Gate CMOS. [link]Paper  bibtex   
@article{journals/jssc/JainKVRTD15,
  added-at = {2015-12-03T00:00:00.000+0100},
  author = {Jain, Rinkle and Kim, Stephen T. and Vaidya, Vaibhav A. and Ravichandran, Krishnan and Tschanz, James W. and De, Vivek},
  biburl = {http://www.bibsonomy.org/bibtex/2221f7b35d9946c442ef07973b0fd7415/dblp},
  ee = {http://dx.doi.org/10.1109/JSSC.2015.2413952},
  interhash = {13f25382bc108f94c2b19683d93b3b30},
  intrahash = {221f7b35d9946c442ef07973b0fd7415},
  journal = {J. Solid-State Circuits},
  keywords = {dblp},
  number = 8,
  pages = {1809-1819},
  timestamp = {2015-12-04T11:34:44.000+0100},
  title = {Conductance Modulation Techniques in Switched-Capacitor DC-DC Converter for Maximum-Efficiency Tracking and Ripple Mitigation in 22 nm Tri-Gate CMOS.},
  url = {http://dblp.uni-trier.de/db/journals/jssc/jssc50.html#JainKVRTD15},
  volume = 50,
  year = 2015
}

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