Dynamically Adaptable Pipeline for Energy-Efficient Microarchitectures Under Wide Voltage Scaling. Jain, S., Lin, L., & Alioto, M. IEEE J. Solid State Circuits, 53(2):632-641, 2018.
Dynamically Adaptable Pipeline for Energy-Efficient Microarchitectures Under Wide Voltage Scaling. [link]Link  Dynamically Adaptable Pipeline for Energy-Efficient Microarchitectures Under Wide Voltage Scaling. [link]Paper  bibtex   
@article{journals/jssc/JainLA18,
  added-at = {2020-08-30T00:00:00.000+0200},
  author = {Jain, Saurabh and Lin, Longyang and Alioto, Massimo},
  biburl = {https://www.bibsonomy.org/bibtex/2ca4fe3bcb9778423d815c83abf6c8375/dblp},
  ee = {https://doi.org/10.1109/JSSC.2017.2768406},
  interhash = {78cbeaf576908b318c71d4c51f731ca9},
  intrahash = {ca4fe3bcb9778423d815c83abf6c8375},
  journal = {IEEE J. Solid State Circuits},
  keywords = {dblp},
  number = 2,
  pages = {632-641},
  timestamp = {2020-08-31T11:41:48.000+0200},
  title = {Dynamically Adaptable Pipeline for Energy-Efficient Microarchitectures Under Wide Voltage Scaling.},
  url = {http://dblp.uni-trier.de/db/journals/jssc/jssc53.html#JainLA18},
  volume = 53,
  year = 2018
}

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