{"_id":"y52iB9bgqBNim2X7z","bibbaseid":"jee-palaniappan-performanceevaluationforacompressedvliwprocessor-2002","author_short":["Jee, S.","Palaniappan, K."],"bibdata":{"bibtype":"inproceedings","type":"inproceedings","author":[{"firstnames":["Sunghyun"],"propositions":[],"lastnames":["Jee"],"suffixes":[]},{"firstnames":["Kannappan"],"propositions":[],"lastnames":["Palaniappan"],"suffixes":[]}],"editor":[{"firstnames":["Gary","B."],"propositions":[],"lastnames":["Lamont"],"suffixes":[]},{"firstnames":["Hisham"],"propositions":[],"lastnames":["Haddad"],"suffixes":[]},{"firstnames":["George","A."],"propositions":[],"lastnames":["Papadopoulos"],"suffixes":[]},{"firstnames":["Brajendra"],"propositions":[],"lastnames":["Panda"],"suffixes":[]}],"title":"Performance evaluation for a compressed-VLIW processor","booktitle":"Proceedings of the 2002 ACM Symposium on Applied Computing (SAC), March 10-14, 2002, Madrid, Spain","pages":"913–917","publisher":"ACM","year":"2002","url":"https://doi.org/10.1145/508791.508967","doi":"10.1145/508791.508967","timestamp":"Tue, 06 Nov 2018 11:06:47 +0100","biburl":"https://dblp.org/rec/conf/sac/JeeP02.bib","bibsource":"dblp computer science bibliography, https://dblp.org","bibtex":"@inproceedings{DBLP:conf/sac/JeeP02,\n author = {Sunghyun Jee and\n Kannappan Palaniappan},\n editor = {Gary B. Lamont and\n Hisham Haddad and\n George A. Papadopoulos and\n Brajendra Panda},\n title = {Performance evaluation for a compressed-VLIW processor},\n booktitle = {Proceedings of the 2002 {ACM} Symposium on Applied Computing (SAC),\n March 10-14, 2002, Madrid, Spain},\n pages = {913--917},\n publisher = {{ACM}},\n year = {2002},\n url = {https://doi.org/10.1145/508791.508967},\n doi = {10.1145/508791.508967},\n timestamp = {Tue, 06 Nov 2018 11:06:47 +0100},\n biburl = {https://dblp.org/rec/conf/sac/JeeP02.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n","author_short":["Jee, S.","Palaniappan, K."],"editor_short":["Lamont, G. B.","Haddad, H.","Papadopoulos, G. A.","Panda, B."],"key":"DBLP:conf/sac/JeeP02","id":"DBLP:conf/sac/JeeP02","bibbaseid":"jee-palaniappan-performanceevaluationforacompressedvliwprocessor-2002","role":"author","urls":{"Paper":"https://doi.org/10.1145/508791.508967"},"metadata":{"authorlinks":{}}},"bibtype":"inproceedings","biburl":"https://dblp.org/pid/21/700.bib","dataSources":["fTpoadWdPkK6gsAHp","GA8cFNQ4AbbchzoRr"],"keywords":[],"search_terms":["performance","evaluation","compressed","vliw","processor","jee","palaniappan"],"title":"Performance evaluation for a compressed-VLIW processor","year":2002}