@inproceedings{conf/irps/JeongKKKLCBKJSP18,
  added-at = {2019-01-28T00:00:00.000+0100},
  author = {Jeong, Seongwon and Kim, Jinseok and Kim, Ayoung and Kim, Byungwook and Lee, Moonsoo and Chang, Jaewon and Baick, In Hak and Kang, Hanbyul and Ji, Younggeun and Shin, Sangchul and Pae, Sangwoo},
  biburl = {https://www.bibsonomy.org/bibtex/2f8345516297e09ab55ccf4f757edbb02/dblp},
  booktitle = {IRPS},
  crossref = {conf/irps/2018},
  ee = {https://doi.org/10.1109/IRPS.2018.8353653},
  interhash = {6d24318e2760152a103346584036b1f3},
  intrahash = {f8345516297e09ab55ccf4f757edbb02},
  isbn = {978-1-5386-5479-8},
  keywords = {dblp},
  pages = 3,
  publisher = {IEEE},
  timestamp = {2019-01-29T11:42:19.000+0100},
  title = {Optimal design of dummy ball array in wafer level package to improve board level thermal cycle reliability (BLR).},
  url = {http://dblp.uni-trier.de/db/conf/irps/irps2018.html#JeongKKKLCBKJSP18},
  year = 2018
}

{"_id":"fRzqKv9giBBNTMFdt","bibbaseid":"jeong-kim-kim-kim-lee-chang-baick-kang-etal-optimaldesignofdummyballarrayinwaferlevelpackagetoimproveboardlevelthermalcyclereliabilityblr-2018","downloads":0,"creationDate":"2019-02-01T01:48:27.332Z","title":"Optimal design of dummy ball array in wafer level package to improve board level thermal cycle reliability (BLR).","author_short":["Jeong, S.","Kim, J.","Kim, A.","Kim, B.","Lee, M.","Chang, J.","Baick, I. H.","Kang, H.","Ji, Y.","Shin, S.","Pae, S."],"year":2018,"bibtype":"inproceedings","biburl":"http://www.bibsonomy.org/bib/author/kim?items=1000","bibdata":{"bibtype":"inproceedings","type":"inproceedings","added-at":"2019-01-28T00:00:00.000+0100","author":[{"propositions":[],"lastnames":["Jeong"],"firstnames":["Seongwon"],"suffixes":[]},{"propositions":[],"lastnames":["Kim"],"firstnames":["Jinseok"],"suffixes":[]},{"propositions":[],"lastnames":["Kim"],"firstnames":["Ayoung"],"suffixes":[]},{"propositions":[],"lastnames":["Kim"],"firstnames":["Byungwook"],"suffixes":[]},{"propositions":[],"lastnames":["Lee"],"firstnames":["Moonsoo"],"suffixes":[]},{"propositions":[],"lastnames":["Chang"],"firstnames":["Jaewon"],"suffixes":[]},{"propositions":[],"lastnames":["Baick"],"firstnames":["In","Hak"],"suffixes":[]},{"propositions":[],"lastnames":["Kang"],"firstnames":["Hanbyul"],"suffixes":[]},{"propositions":[],"lastnames":["Ji"],"firstnames":["Younggeun"],"suffixes":[]},{"propositions":[],"lastnames":["Shin"],"firstnames":["Sangchul"],"suffixes":[]},{"propositions":[],"lastnames":["Pae"],"firstnames":["Sangwoo"],"suffixes":[]}],"biburl":"https://www.bibsonomy.org/bibtex/2f8345516297e09ab55ccf4f757edbb02/dblp","booktitle":"IRPS","crossref":"conf/irps/2018","ee":"https://doi.org/10.1109/IRPS.2018.8353653","interhash":"6d24318e2760152a103346584036b1f3","intrahash":"f8345516297e09ab55ccf4f757edbb02","isbn":"978-1-5386-5479-8","keywords":"dblp","pages":"3","publisher":"IEEE","timestamp":"2019-01-29T11:42:19.000+0100","title":"Optimal design of dummy ball array in wafer level package to improve board level thermal cycle reliability (BLR).","url":"http://dblp.uni-trier.de/db/conf/irps/irps2018.html#JeongKKKLCBKJSP18","year":"2018","bibtex":"@inproceedings{conf/irps/JeongKKKLCBKJSP18,\n added-at = {2019-01-28T00:00:00.000+0100},\n author = {Jeong, Seongwon and Kim, Jinseok and Kim, Ayoung and Kim, Byungwook and Lee, Moonsoo and Chang, Jaewon and Baick, In Hak and Kang, Hanbyul and Ji, Younggeun and Shin, Sangchul and Pae, Sangwoo},\n biburl = {https://www.bibsonomy.org/bibtex/2f8345516297e09ab55ccf4f757edbb02/dblp},\n booktitle = {IRPS},\n crossref = {conf/irps/2018},\n ee = {https://doi.org/10.1109/IRPS.2018.8353653},\n interhash = {6d24318e2760152a103346584036b1f3},\n intrahash = {f8345516297e09ab55ccf4f757edbb02},\n isbn = {978-1-5386-5479-8},\n keywords = {dblp},\n pages = 3,\n publisher = {IEEE},\n timestamp = {2019-01-29T11:42:19.000+0100},\n title = {Optimal design of dummy ball array in wafer level package to improve board level thermal cycle reliability (BLR).},\n url = {http://dblp.uni-trier.de/db/conf/irps/irps2018.html#JeongKKKLCBKJSP18},\n year = 2018\n}\n\n","author_short":["Jeong, S.","Kim, J.","Kim, A.","Kim, B.","Lee, M.","Chang, J.","Baick, I. H.","Kang, H.","Ji, Y.","Shin, S.","Pae, S."],"key":"conf/irps/JeongKKKLCBKJSP18","id":"conf/irps/JeongKKKLCBKJSP18","bibbaseid":"jeong-kim-kim-kim-lee-chang-baick-kang-etal-optimaldesignofdummyballarrayinwaferlevelpackagetoimproveboardlevelthermalcyclereliabilityblr-2018","role":"author","urls":{"Link":"https://doi.org/10.1109/IRPS.2018.8353653","Paper":"http://dblp.uni-trier.de/db/conf/irps/irps2018.html#JeongKKKLCBKJSP18"},"keyword":["dblp"],"downloads":0},"search_terms":["optimal","design","dummy","ball","array","wafer","level","package","improve","board","level","thermal","cycle","reliability","blr","jeong","kim","kim","kim","lee","chang","baick","kang","ji","shin","pae"],"keywords":["dblp"],"authorIDs":[],"dataSources":["bboPFacHd3A4uT9fM"]}