A 5.8nW, 45ppm/°C on-chip CMOS wake-up timer using a constant charge subtraction scheme. Jeong, S., Lee, I., Blaauw, D., & Sylvester, D. In Custom Integrated Circuits Conference (CICC), 2014 IEEE Proceedings of the, pages 1–4, September, 2014.
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This work presents an ultra-low power oscillator designed for wake-up timers in compact wireless sensors. A constant charge subtraction scheme removes continuous comparator delay from the oscillation period, which is the source of temperature dependence in conventional RC relaxation oscillators. This relaxes comparator design constraints, enabling low power operation. In 0.18μm CMOS, the oscillator consumes 5.8nW at room temperature with temperature stability of 45ppm/°C (-10°C to 90°C) and 1%V line sensitivity.
@inproceedings{jeong_5.8nw_2014,
	title = {A 5.8nW, 45ppm/°{C} on-chip {CMOS} wake-up timer using a constant charge subtraction scheme},
	doi = {10.1109/CICC.2014.6946008},
	abstract = {This work presents an ultra-low power oscillator designed for wake-up timers in compact wireless sensors. A constant charge subtraction scheme removes continuous comparator delay from the oscillation period, which is the source of temperature dependence in conventional RC relaxation oscillators. This relaxes comparator design constraints, enabling low power operation. In 0.18μm CMOS, the oscillator consumes 5.8nW at room temperature with temperature stability of 45ppm/°C (-10°C to 90°C) and 1\%V line sensitivity.},
	booktitle = {Custom {Integrated} {Circuits} {Conference} ({CICC}), 2014 {IEEE} {Proceedings} of the},
	author = {Jeong, Seokhyeon and Lee, Inhee and Blaauw, D. and Sylvester, D.},
	month = sep,
	year = {2014},
	pages = {1--4}
}

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