Making multi-cores mainstream – from security to scalability. Jesshope, C., Hicks, M., Lankamp, M., Poss, R., & Zhang, L. In Chapman, B., Desprez, F., Joubert, G. R., Lichnewsky, A., Peters, F., & Priol, T., editors, Parallel Computing: From Multicores and GPU's to Petascale, volume 19, of Advances in Parallel Computing, pages 16–31. IOS Press, 2010. ![Making multi-cores mainstream – from security to scalability [link]](https://bibbase.org/img/filetypes/link.svg "link")
Doi ![Making multi-cores mainstream – from security to scalability [pdf]](https://bibbase.org/img/filetypes/pdf.svg "pdf")
Local doi abstract bibtex In this paper we will introduce work being supported by the EU in the Apple-CORE project (http://www.apple-core.info). This project is pushing the boundaries of programming and systems development in multi-core architectures in an attempt to make multi-core go mainstream, i.e. continuing the current trends in low-power, multi-core architecture to thousands of cores on chip and supporting this in the context of the next generations of PCs. This work supports dataflow principles but with a conventional programming style. The paper describes the underlying execution model, a core design based on this model and its emulation in software. We also consider system issues that impact security. The major benefits of this approach include asynchrony, i.e. the ability to tolerate long latency operations without impacting performance and binary compatibility. We present results that show very high efficiency and good scalability despite the high memory access latency in the proposed chip architecture.
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Abstract = {In this paper we will introduce work being supported by the EU in the Apple-CORE project (http://www.apple-core.info). This project is pushing the boundaries of programming and systems development in multi-core architectures in an attempt to make multi-core go mainstream, i.e. continuing the current trends in low-power, multi-core architecture to thousands of cores on chip and supporting this in the context of the next generations of PCs. This work supports dataflow principles but with a conventional programming style. The paper describes the underlying execution model, a core design based on this model and its emulation in software. We also consider system issues that impact security. The major benefits of this approach include asynchrony, i.e. the ability to tolerate long latency operations without impacting performance and binary compatibility. We present results that show very high efficiency and good scalability despite the high memory access latency in the proposed chip architecture. },
Author = {Chris Jesshope and Michael Hicks and Mike Lankamp and Raphael Poss and Li Zhang},
Booktitle = {Parallel Computing: From Multicores and GPU's to Petascale},
Doi = {10.3233/978-1-60750-530-3-16}, Urldoi = {http://dx.doi.org/10.3233/978-1-60750-530-3-16},
Editor = {Barbara Chapman and Fr{\'e}d{\'e}ric Desprez and Gerhard R. Joubert and Alain Lichnewsky and Frans Peters and Thierry Priol},
Isbn = {978-1-60750-529-7},
Pages = {16--31},
Publisher = {{IOS} Press},
Read = {1},
Series = {Advances in Parallel Computing},
Title = {Making multi-cores mainstream -- from security to scalability},
Urllocal = {pub/jesshope.09.parco.pdf},
Volume = {19},
Year = {2010},
}
Downloads: 0
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