Omnipotent and mortal training of a nanocell model to emulate the functionality of a logic gate. Jha, P., K. & Sahula, V. In 2010 Annual IEEE India Conference (INDICON), pages 1-6, 12, 2010. IEEE.
Omnipotent and mortal training of a nanocell model to emulate the functionality of a logic gate [pdf]Paper  Omnipotent and mortal training of a nanocell model to emulate the functionality of a logic gate [link]Website  abstract   bibtex   
Various unavoidable constraints (viz. physical, technical and financial) curtail the possibility of achieving continuous improvement in the computing capabilities through scaling down of devices using the conventional silicon technology. Molecular electronics aims to use the bottom-up approach to build nanoscale devices from basic molecular unit and promises unforeseen levels of computing per dollar-watt-cm2. The programmability feature of molecules is exploited to circumvent the problem of addressability. The nanocell concept is predicated on the belief that a random distribution of self-assembled molecules can be programmed to perform a specific logic function. In this paper we present a novel approach to demonstrate plausibility of the idea of “creating functionality from disorder”. The experimental results vindicate the plausibility of training a nanocell to perform a logic operation. A negative differential resistance (NDR) circuit has been designed to emulate the Λ-type I-V characteristics of the molecular switches connected between any pair of nodes in the actual nanocell. A nanocell model is then constructed taking instances of this NDR circuit. As a primary exploration of the nanocell concept the omnipotent programming was considered. The results from HSPICE simulations are then fed to the genetic algorithm(GA) solver in MATLAB to provide us with the optimized configuration(or a combination of switch states) of the NDR circuits for which the nanocell model yields the functionality of one or multiple target logic devices. Finally mortal programming is also accomplished. The GA solver is used again to provide us with the voltages which ought to be applied on each of the exterior nodes (apart from the input and output nodes) of the nanocell to yield a response resembling a NAND gate.
@inProceedings{
 title = {Omnipotent and mortal training of a nanocell model to emulate the functionality of a logic gate},
 type = {inProceedings},
 year = {2010},
 identifiers = {[object Object]},
 keywords = {Beyond CMOS,Genetic algorithm,Molecular electronics,Mortal,Nanocell,Negative differential resistance,Omnipotent,Programmability,SPICE,genetic algorithms,logic gates,molecular ele},
 pages = {1-6},
 websites = {http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=5712699},
 month = {12},
 publisher = {IEEE},
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 short_title = {India Conference (INDICON), 2010 Annual IEEE},
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 abstract = {Various unavoidable constraints (viz. physical, technical and financial) curtail the possibility of achieving continuous improvement in the computing capabilities through scaling down of devices using the conventional silicon technology. Molecular electronics aims to use the bottom-up approach to build nanoscale devices from basic molecular unit and promises unforeseen levels of computing per dollar-watt-cm2. The programmability feature of molecules is exploited to circumvent the problem of addressability. The nanocell concept is predicated on the belief that a random distribution of self-assembled molecules can be programmed to perform a specific logic function. In this paper we present a novel approach to demonstrate plausibility of the idea of “creating functionality from disorder”. The experimental results vindicate the plausibility of training a nanocell to perform a logic operation. A negative differential resistance (NDR) circuit has been designed to emulate the Λ-type I-V characteristics of the molecular switches connected between any pair of nodes in the actual nanocell. A nanocell model is then constructed taking instances of this NDR circuit. As a primary exploration of the nanocell concept the omnipotent programming was considered. The results from HSPICE simulations are then fed to the genetic algorithm(GA) solver in MATLAB to provide us with the optimized configuration(or a combination of switch states) of the NDR circuits for which the nanocell model yields the functionality of one or multiple target logic devices. Finally mortal programming is also accomplished. The GA solver is used again to provide us with the voltages which ought to be applied on each of the exterior nodes (apart from the input and output nodes) of the nanocell to yield a response resembling a NAND gate.},
 bibtype = {inProceedings},
 author = {Jha, Pankaj Kumar and Sahula, Vineet},
 booktitle = {2010 Annual IEEE India Conference (INDICON)}
}
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