Optimizing Parallel Reduction on OpenCL FPGA Platform - A Case Study of Frequent Pattern Compression. Jin, Z. & Finkel, H. In IPDPS Workshops, pages 27-35, 2018. IEEE Computer Society.
Optimizing Parallel Reduction on OpenCL FPGA Platform - A Case Study of Frequent Pattern Compression. [link]Link  Optimizing Parallel Reduction on OpenCL FPGA Platform - A Case Study of Frequent Pattern Compression. [link]Paper  bibtex   
@inproceedings{conf/ipps/JinF18,
  added-at = {2018-08-09T00:00:00.000+0200},
  author = {Jin, Zheming and Finkel, Hal},
  biburl = {https://www.bibsonomy.org/bibtex/2586a560a0207368d982bcd8728080d94/dblp},
  booktitle = {IPDPS Workshops},
  crossref = {conf/ipps/2018w},
  ee = {http://doi.ieeecomputersociety.org/10.1109/IPDPSW.2018.00015},
  interhash = {69fb9f93736ec4f79f38ac326fca48e5},
  intrahash = {586a560a0207368d982bcd8728080d94},
  isbn = {978-1-5386-5555-9},
  keywords = {dblp},
  pages = {27-35},
  publisher = {IEEE Computer Society},
  timestamp = {2019-10-17T20:34:40.000+0200},
  title = {Optimizing Parallel Reduction on OpenCL FPGA Platform - A Case Study of Frequent Pattern Compression.},
  url = {http://dblp.uni-trier.de/db/conf/ipps/ipdps2018w.html#JinF18},
  year = 2018
}

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