Graphene-Complex-Oxide Nanoscale Device Concepts. Jnawali, G., Lee, H., Lee, J., Huang, M., Hsu, J., Bi, F., Zhou, R., Cheng, G., D'Urso, B., Irvin, P., Eom, C., & Levy, J. ACS NANO, 12(6):6128-6136, JUN, 2018. doi abstract bibtex The integration of graphene with complex oxide heterostructures such as LaAlO3/SrTiO3 offers the opportunity to combine the multifunctional properties of an oxide interface with the exceptional electronic properties of graphene. The ability to control interface conduction through graphene and understanding how it affects the intrinsic properties of an oxide interface are critical to the technological development of multifunctional devices. Here we demonstrate several device archetypes in which electron transport at an oxide interface is modulated using a patterned graphene top-gate. Nanoscale devices are fabricated at the oxide interface by conductive atomic force microscope (c-AFM) lithography, and transport measurements are performed as a function of the graphene gate voltage. Experiments are performed with devices written adjacent to or directly underneath the graphene gate. Distinct capabilities of this approach include the ability to create highly flexible device configurations, the ability to modulate carrier density at the oxide interface, and the ability to control electron transport up to the single-electron tunneling regime, while maintaining intrinsic transport properties of the oxide interface. Our results facilitate the design of a variety of nanoscale devices that combine excellent transport properties of these two proximal two-dimensional electron systems.
@article{ ISI:000436910200111,
Author = {Jnawali, Giriraj and Lee, Hyungwoo and Lee, Jung-Woo and Huang, Mengchen
and Hsu, Jen-Feng and Bi, Feng and Zhou, Rongpu and Cheng, Guanglei and
D'Urso, Brian and Irvin, Patrick and Eom, Chang-Beom and Levy, Jeremy},
Title = {{Graphene-Complex-Oxide Nanoscale Device Concepts}},
Journal = {{ACS NANO}},
Year = {{2018}},
Volume = {{12}},
Number = {{6}},
Pages = {{6128-6136}},
Month = {{JUN}},
Abstract = {{The integration of graphene with complex oxide heterostructures such as
LaAlO3/SrTiO3 offers the opportunity to combine the multifunctional
properties of an oxide interface with the exceptional electronic
properties of graphene. The ability to control interface conduction
through graphene and understanding how it affects the intrinsic
properties of an oxide interface are critical to the technological
development of multifunctional devices. Here we demonstrate several
device archetypes in which electron transport at an oxide interface is
modulated using a patterned graphene top-gate. Nanoscale devices are
fabricated at the oxide interface by conductive atomic force microscope
(c-AFM) lithography, and transport measurements are performed as a
function of the graphene gate voltage. Experiments are performed with
devices written adjacent to or directly underneath the graphene gate.
Distinct capabilities of this approach include the ability to create
highly flexible device configurations, the ability to modulate carrier
density at the oxide interface, and the ability to control electron
transport up to the single-electron tunneling regime, while maintaining
intrinsic transport properties of the oxide interface. Our results
facilitate the design of a variety of nanoscale devices that combine
excellent transport properties of these two proximal two-dimensional
electron systems.}},
DOI = {{10.1021/acsnano.8b02457}},
ISSN = {{1936-0851}},
EISSN = {{1936-086X}},
Unique-ID = {{ISI:000436910200111}},
}
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The ability to control interface conduction through graphene and understanding how it affects the intrinsic properties of an oxide interface are critical to the technological development of multifunctional devices. Here we demonstrate several device archetypes in which electron transport at an oxide interface is modulated using a patterned graphene top-gate. Nanoscale devices are fabricated at the oxide interface by conductive atomic force microscope (c-AFM) lithography, and transport measurements are performed as a function of the graphene gate voltage. Experiments are performed with devices written adjacent to or directly underneath the graphene gate. Distinct capabilities of this approach include the ability to create highly flexible device configurations, the ability to modulate carrier density at the oxide interface, and the ability to control electron transport up to the single-electron tunneling regime, while maintaining intrinsic transport properties of the oxide interface. Our results facilitate the design of a variety of nanoscale devices that combine excellent transport properties of these two proximal two-dimensional electron systems.","doi":"10.1021/acsnano.8b02457","issn":"1936-0851","eissn":"1936-086X","unique-id":"ISI:000436910200111","bibtex":"@article{ ISI:000436910200111,\nAuthor = {Jnawali, Giriraj and Lee, Hyungwoo and Lee, Jung-Woo and Huang, Mengchen\n and Hsu, Jen-Feng and Bi, Feng and Zhou, Rongpu and Cheng, Guanglei and\n D'Urso, Brian and Irvin, Patrick and Eom, Chang-Beom and Levy, Jeremy},\nTitle = {{Graphene-Complex-Oxide Nanoscale Device Concepts}},\nJournal = {{ACS NANO}},\nYear = {{2018}},\nVolume = {{12}},\nNumber = {{6}},\nPages = {{6128-6136}},\nMonth = {{JUN}},\nAbstract = {{The integration of graphene with complex oxide heterostructures such as\n LaAlO3/SrTiO3 offers the opportunity to combine the multifunctional\n properties of an oxide interface with the exceptional electronic\n properties of graphene. The ability to control interface conduction\n through graphene and understanding how it affects the intrinsic\n properties of an oxide interface are critical to the technological\n development of multifunctional devices. Here we demonstrate several\n device archetypes in which electron transport at an oxide interface is\n modulated using a patterned graphene top-gate. Nanoscale devices are\n fabricated at the oxide interface by conductive atomic force microscope\n (c-AFM) lithography, and transport measurements are performed as a\n function of the graphene gate voltage. Experiments are performed with\n devices written adjacent to or directly underneath the graphene gate.\n Distinct capabilities of this approach include the ability to create\n highly flexible device configurations, the ability to modulate carrier\n density at the oxide interface, and the ability to control electron\n transport up to the single-electron tunneling regime, while maintaining\n intrinsic transport properties of the oxide interface. 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