@inProceedings{
 title = {New developments for CMOS SSPMs},
 type = {inProceedings},
 year = {2008},
 identifiers = {[object Object]},
 id = {816dac33-b198-3ce3-b04b-d3dff2eeea08},
 created = {2019-01-03T18:53:26.234Z},
 file_attached = {false},
 profile_id = {a23404c5-15bf-39ab-8318-36c4b5c39dab},
 last_modified = {2019-01-03T18:53:26.234Z},
 read = {false},
 starred = {false},
 authored = {true},
 confirmed = {false},
 hidden = {false},
 private_publication = {false},
 abstract = {A high fill factor SSPM built using a standard CMOS fabrication process can provide an energy resolution of 12.4% at 511 keV using CsI(TI) crystals. The SSPM was operated at an excess bias of 2 V and 0 °C. The magnitude of the noise terms of the SSPM under these conditions are provided. This is compared to the energy resolution of 11.7% using a PMT at room temperature and the identical crystal. CMOS SSPMs can provide PMT-like energy resolution. Additional developments in back-illuminated and positionsensitive SSPMs devices are provided. A back-illuminated device has the promise of a low-noise, high fill-factor design, and the initial results of the quantum efficiency of back-illuminated, thinned devices, fabricated with an existing SSPM design, are provided. For position-sensitive SSPMs, an image of a 3 × 3 CsI array has been made with an SSPM based on a resistive-network configuration to provide position information has been made with minimal distortions. © 2008 IEEE.},
 bibtype = {inProceedings},
 author = {Johnson, E.B. and Stapels, C.J. and McClish, M. and Mukhopadhyay, S. and Linsay, P. and Shah, K. and Barton, P. and Wehe, D. and Augustine, S. and Christian, J.F.},
 booktitle = {IEEE Nuclear Science Symposium Conference Record}
}

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