Electronic Sleep Stage Classifiers: A Survey and VLSI Design Methodology. Kassiri, H., Chemparathy, A., Salam, M. T., Boyce, R. D., Adamantidis, A., & Genov, R. IEEE Trans. Biomed. Circuits Syst., 11(1):177–188, 2017.
Paper doi bibtex @article{DBLP:journals/tbcas/KassiriCSBAG17,
author = {Hossein Kassiri and
Aditi Chemparathy and
Muhammad Tariqus Salam and
Richard D. Boyce and
Antoine Adamantidis and
Roman Genov},
title = {Electronic Sleep Stage Classifiers: {A} Survey and {VLSI} Design Methodology},
journal = {{IEEE} Trans. Biomed. Circuits Syst.},
volume = {11},
number = {1},
pages = {177--188},
year = {2017},
url = {https://doi.org/10.1109/TBCAS.2016.2540438},
doi = {10.1109/TBCAS.2016.2540438},
timestamp = {Tue, 25 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tbcas/KassiriCSBAG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
Downloads: 0
{"_id":"aqyZNzRWgTjnyfqf8","bibbaseid":"kassiri-chemparathy-salam-boyce-adamantidis-genov-electronicsleepstageclassifiersasurveyandvlsidesignmethodology-2017","author_short":["Kassiri, H.","Chemparathy, A.","Salam, M. T.","Boyce, R. D.","Adamantidis, A.","Genov, R."],"bibdata":{"bibtype":"article","type":"article","author":[{"firstnames":["Hossein"],"propositions":[],"lastnames":["Kassiri"],"suffixes":[]},{"firstnames":["Aditi"],"propositions":[],"lastnames":["Chemparathy"],"suffixes":[]},{"firstnames":["Muhammad","Tariqus"],"propositions":[],"lastnames":["Salam"],"suffixes":[]},{"firstnames":["Richard","D."],"propositions":[],"lastnames":["Boyce"],"suffixes":[]},{"firstnames":["Antoine"],"propositions":[],"lastnames":["Adamantidis"],"suffixes":[]},{"firstnames":["Roman"],"propositions":[],"lastnames":["Genov"],"suffixes":[]}],"title":"Electronic Sleep Stage Classifiers: A Survey and VLSI Design Methodology","journal":"IEEE Trans. Biomed. Circuits Syst.","volume":"11","number":"1","pages":"177–188","year":"2017","url":"https://doi.org/10.1109/TBCAS.2016.2540438","doi":"10.1109/TBCAS.2016.2540438","timestamp":"Tue, 25 Apr 2023 01:00:00 +0200","biburl":"https://dblp.org/rec/journals/tbcas/KassiriCSBAG17.bib","bibsource":"dblp computer science bibliography, https://dblp.org","bibtex":"@article{DBLP:journals/tbcas/KassiriCSBAG17,\n author = {Hossein Kassiri and\n Aditi Chemparathy and\n Muhammad Tariqus Salam and\n Richard D. Boyce and\n Antoine Adamantidis and\n Roman Genov},\n title = {Electronic Sleep Stage Classifiers: {A} Survey and {VLSI} Design Methodology},\n journal = {{IEEE} Trans. Biomed. Circuits Syst.},\n volume = {11},\n number = {1},\n pages = {177--188},\n year = {2017},\n url = {https://doi.org/10.1109/TBCAS.2016.2540438},\n doi = {10.1109/TBCAS.2016.2540438},\n timestamp = {Tue, 25 Apr 2023 01:00:00 +0200},\n biburl = {https://dblp.org/rec/journals/tbcas/KassiriCSBAG17.bib},\n bibsource = {dblp computer science bibliography, https://dblp.org}\n}\n\n","author_short":["Kassiri, H.","Chemparathy, A.","Salam, M. T.","Boyce, R. D.","Adamantidis, A.","Genov, R."],"key":"DBLP:journals/tbcas/KassiriCSBAG17","id":"DBLP:journals/tbcas/KassiriCSBAG17","bibbaseid":"kassiri-chemparathy-salam-boyce-adamantidis-genov-electronicsleepstageclassifiersasurveyandvlsidesignmethodology-2017","role":"author","urls":{"Paper":"https://doi.org/10.1109/TBCAS.2016.2540438"},"metadata":{"authorlinks":{}}},"bibtype":"article","biburl":"https://dblp.org/pid/156/4834.bib","dataSources":["HcWjwtYE4NCzoYzaQ"],"keywords":[],"search_terms":["electronic","sleep","stage","classifiers","survey","vlsi","design","methodology","kassiri","chemparathy","salam","boyce","adamantidis","genov"],"title":"Electronic Sleep Stage Classifiers: A Survey and VLSI Design Methodology","year":2017}