Aging and voltage scaling impacts under neutron-induced soft error rate in SRAM-based FPGAs. Kastensmidt, F. L., Tonfat, J. L., Both, T. H., Rech, P., Wirth, G. I., Reis, R., Bruguier, F., Benoit, P., Torres, L., & Frost, C. In 19th IEEE European Test Symposium, ETS 2014, Paderborn, Germany, May 26-30, 2014, pages 1–2, 2014. IEEE.
Aging and voltage scaling impacts under neutron-induced soft error rate in SRAM-based FPGAs [link]Paper  doi  bibtex   
@inproceedings{DBLP:conf/ets/KastensmidtTBRWRBBTF14,
  author    = {Fernanda Lima Kastensmidt and
               Jorge L. Tonfat and
               Thiago Hanna Both and
               Paolo Rech and
               Gilson I. Wirth and
               Ricardo Reis and
               Florent Bruguier and
               Pascal Benoit and
               Lionel Torres and
               Christopher Frost},
  editor    = {Giorgio Di Natale},
  title     = {Aging and voltage scaling impacts under neutron-induced soft error
               rate in SRAM-based FPGAs},
  booktitle = {19th {IEEE} European Test Symposium, {ETS} 2014, Paderborn, Germany,
               May 26-30, 2014},
  pages     = {1--2},
  publisher = {{IEEE}},
  year      = {2014},
  url       = {https://doi.org/10.1109/ETS.2014.6847845},
  doi       = {10.1109/ETS.2014.6847845},
  timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/ets/KastensmidtTBRWRBBTF14.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

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