Voltage scaling and aging effects on soft error rate in SRAM-based FPGAs. Kastensmidt, F. L., Tonfat, J. L., Both, T. H., Rech, P., Wirth, G. I., Reis, R., Bruguier, F., Benoit, P., Torres, L., & Frost, C. Microelectron. Reliab., 54(9-10):2344–2348, 2014.
Voltage scaling and aging effects on soft error rate in SRAM-based FPGAs [link]Paper  doi  bibtex   
@article{DBLP:journals/mr/KastensmidtTBRW14,
  author    = {Fernanda Lima Kastensmidt and
               Jorge L. Tonfat and
               Thiago Hanna Both and
               Paolo Rech and
               Gilson I. Wirth and
               Ricardo Reis and
               Florent Bruguier and
               Pascal Benoit and
               Lionel Torres and
               Christopher Frost},
  title     = {Voltage scaling and aging effects on soft error rate in SRAM-based
               FPGAs},
  journal   = {Microelectron. Reliab.},
  volume    = {54},
  number    = {9-10},
  pages     = {2344--2348},
  year      = {2014},
  url       = {https://doi.org/10.1016/j.microrel.2014.07.100},
  doi       = {10.1016/j.microrel.2014.07.100},
  timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/journals/mr/KastensmidtTBRW14.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}

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