Multirate analysis method for a power electronic system by circuit partitioning. Kato, T., Inoue, K., Fukutani, T., & Kanda, Y. IEEE Transactions on Power Electronics, 24:2791-2802, 2009.
doi  abstract   bibtex   
Various fast and efficient computation techniques for a power converter simulation have been researched. According to the conventional methods, a single step size for a whole circuit is selected for the numerical integration. A real-power electronic system, however, is multirate in that its currents and voltages nonuniformly vary spatially and temporally, and its subcircuits have different transient rates. A simulation that selected an appropriate step size for each subcircuit independently would, therefore, be more efficient. Several multirate analysis techniques have already been proposed; this paper proposes a new method that divides the whole circuit into subcircuits by applying an explicit integration formula to series inductors and/or parallel capacitors, and then integrates subcircuits by applying an implicit formula with independent integration step sizes. As analysis examples, this method is applied to an acdc converter, a benchmark test circuit, and a dc-link inverter control system. The proposed methods effectiveness at reducing computational steps and CPU times is investigated, and its performance and efficiency are validated. © 2006 IEEE.
@article{Kato2009,
   abstract = {Various fast and efficient computation techniques for a power converter simulation have been researched. According to the conventional methods, a single step size for a whole circuit is selected for the numerical integration. A real-power electronic system, however, is multirate in that its currents and voltages nonuniformly vary spatially and temporally, and its subcircuits have different transient rates. A simulation that selected an appropriate step size for each subcircuit independently would, therefore, be more efficient. Several multirate analysis techniques have already been proposed; this paper proposes a new method that divides the whole circuit into subcircuits by applying an explicit integration formula to series inductors and/or parallel capacitors, and then integrates subcircuits by applying an implicit formula with independent integration step sizes. As analysis examples, this method is applied to an acdc converter, a benchmark test circuit, and a dc-link inverter control system. The proposed methods effectiveness at reducing computational steps and CPU times is investigated, and its performance and efficiency are validated. © 2006 IEEE.},
   author = {Toshiji Kato and Kaoru Inoue and Takayuki Fukutani and Yoshinori Kanda},
   doi = {10.1109/TPEL.2009.2030959},
   issn = {08858993},
   issue = {12},
   journal = {IEEE Transactions on Power Electronics},
   keywords = {Multirate analysis,Partitioned circuit analysis,Power converter analysis},
   pages = {2791-2802},
   title = {Multirate analysis method for a power electronic system by circuit partitioning},
   volume = {24},
   year = {2009},
}

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