Exploiting Fine-grain Thread Level Parallelism on the MIT Multi-ALU Processor. Keckler, S. W., Dally, W. J., Maskit, D., Carter, N. P., Chang, A., & Sing Lee, W. In Proceedings of International Symposium on Computer Architecture (ISCA), pages 306-317, 1998.
Exploiting Fine-grain Thread Level Parallelism on the MIT Multi-ALU Processor [link]Paper  bibtex   
@inproceedings{ dblp3393879,
  title = {Exploiting Fine-grain Thread Level Parallelism on the MIT Multi-ALU Processor},
  author = {Stephen W. Keckler and William J. Dally and Daniel Maskit and Nicholas P. Carter and Andrew Chang and Whay Sing Lee},
  author_short = {Keckler, S. W. and Dally, W. J. and Maskit, D. and Carter, N. P. and Chang, A. and Sing Lee, W.},
  bibtype = {inproceedings},
  type = {inproceedings},
  year = {1998},
  key = {dblp3393879},
  id = {dblp3393879},
  biburl = {http://www.dblp.org/rec/bibtex/conf/isca/KecklerDMCCL98},
  url = {http://doi.acm.org/10.1145/279358.279399},
  conference = {ISCA},
  pages = {306-317},
  text = {ISCA 1998:306-317},
  booktitle = {Proceedings of International Symposium on Computer Architecture (ISCA)}
}

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