A 50-Gb/s differential transimpedance amplifier in 65nm CMOS technology. Kim, S. G., Jung, S., Eo, Y. S., Kim, S., Ying, X., Choi, H., Hong, C., Lee, K., & Park, S. M. In A-SSCC, pages 357-360, 2014. IEEE.
A 50-Gb/s differential transimpedance amplifier in 65nm CMOS technology. [link]Link  A 50-Gb/s differential transimpedance amplifier in 65nm CMOS technology. [link]Paper  bibtex   
@inproceedings{conf/asscc/KimJEKYCHLP14,
  added-at = {2016-11-23T00:00:00.000+0100},
  author = {Kim, Sang Gyun and Jung, Seung-Hwan and Eo, Yun Seong and Kim, Seung-Hoon and Ying, Xiao and Choi, Hanbyul and Hong, Chaerin and Lee, Kyungmin and Park, Sung Min},
  biburl = {https://www.bibsonomy.org/bibtex/2748dc57ce94995fa1537c31d18c9a3e4/dblp},
  booktitle = {A-SSCC},
  crossref = {conf/asscc/2014},
  ee = {http://dx.doi.org/10.1109/ASSCC.2014.7008934},
  interhash = {74869842ecdb13af15213baf7c002609},
  intrahash = {748dc57ce94995fa1537c31d18c9a3e4},
  isbn = {978-1-4799-4090-5},
  keywords = {dblp},
  pages = {357-360},
  publisher = {IEEE},
  timestamp = {2016-11-24T11:33:32.000+0100},
  title = {A 50-Gb/s differential transimpedance amplifier in 65nm CMOS technology.},
  url = {http://dblp.uni-trier.de/db/conf/asscc/asscc2014.html#KimJEKYCHLP14},
  year = 2014
}

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