On-chip memory optimization for high-level synthesis of multi-dimensional data on FPGA. Kim, D., Lee, S., & Lee, J. In ASP-DAC, pages 243-248, 2019. ACM.
On-chip memory optimization for high-level synthesis of multi-dimensional data on FPGA. [link]Link  On-chip memory optimization for high-level synthesis of multi-dimensional data on FPGA. [link]Paper  bibtex   
@inproceedings{conf/aspdac/KimLL19,
  added-at = {2019-01-20T00:00:00.000+0100},
  author = {Kim, Daewoo and Lee, Sugil and Lee, Jongeun},
  biburl = {https://www.bibsonomy.org/bibtex/20b35de5f47e5611d7cee36ec532acd3d/dblp},
  booktitle = {ASP-DAC},
  crossref = {conf/aspdac/2019},
  editor = {Shibuya, Toshiyuki},
  ee = {https://doi.org/10.1145/3287624.3287669},
  interhash = {1b0964283ba39ca50140be3925b9e510},
  intrahash = {0b35de5f47e5611d7cee36ec532acd3d},
  isbn = {978-1-4503-6007-4},
  keywords = {dblp},
  pages = {243-248},
  publisher = {ACM},
  timestamp = {2019-01-22T11:38:45.000+0100},
  title = {On-chip memory optimization for high-level synthesis of multi-dimensional data on FPGA.},
  url = {http://dblp.uni-trier.de/db/conf/aspdac/aspdac2019.html#KimLL19},
  year = 2019
}

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