A low power binary square rooter using reversible logic. Krishna, A., Raj, L. A., Priyadarsini, G, Raghul, S, & Ramesh, S. In 2019 5th International Conference on Advanced Computing & Communication Systems (ICACCS), pages 619–623, 2019. IEEE.
bibtex   
@inproceedings{krishna2019low,
  title={A low power binary square rooter using reversible logic},
  author={Krishna, Adarsh and Raj, LS Anusree and Priyadarsini, G and Raghul, S and Ramesh, SR},
  booktitle={2019 5th International Conference on Advanced Computing \& Communication Systems (ICACCS)},
  pages={619--623},
  year={2019},
  organization={IEEE}
}

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