FPGA-based implementation of M4RM for matrix multiplication over GF(2). Kumar, V., Kumar, V. B. Y., & Patkar, S. B. In VDAT, pages 1-2, 2014. IEEE.
FPGA-based implementation of M4RM for matrix multiplication over GF(2). [link]Link  FPGA-based implementation of M4RM for matrix multiplication over GF(2). [link]Paper  bibtex   
@inproceedings{conf/vdat/KumarKP14,
  added-at = {2015-01-14T00:00:00.000+0100},
  author = {Kumar, Vivek and Kumar, Vinay B. Y. and Patkar, Sachin B.},
  biburl = {http://www.bibsonomy.org/bibtex/2d7a5e8927f7aea06284be8707b3fd58b/dblp},
  booktitle = {VDAT},
  crossref = {conf/vdat/2014},
  ee = {http://dx.doi.org/10.1109/ISVDAT.2014.6881072},
  interhash = {b460b59ff6a49ec1f30432f10ab79571},
  intrahash = {d7a5e8927f7aea06284be8707b3fd58b},
  isbn = {978-1-4799-5088-1},
  keywords = {dblp},
  pages = {1-2},
  publisher = {IEEE},
  timestamp = {2015-06-18T15:14:43.000+0200},
  title = {FPGA-based implementation of M4RM for matrix multiplication over GF(2).},
  url = {http://dblp.uni-trier.de/db/conf/vdat/vdat2014.html#KumarKP14},
  year = 2014
}

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