Hardware-software architecture for priority queue management in real-time and embedded systems. Kumar, N. G. C., Vyas, S., Cytron, R. K., Gill, C. D., Zambreno, J., & Jones, P. H. Int. J. Embed. Syst., 6(4):319-334, 2014.
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Paper bibtex @article{journals/ijes/KumarVCGZJ14,
added-at = {2020-09-11T00:00:00.000+0200},
author = {Kumar, N. G. Chetan and Vyas, Sudhanshu and Cytron, Ron K. and Gill, Christopher D. and Zambreno, Joseph and Jones, Phillip H.},
biburl = {https://www.bibsonomy.org/bibtex/27bb8d137b23b8510e29ac3538ffad567/dblp},
ee = {https://doi.org/10.1504/IJES.2014.064997},
interhash = {4a30e968db4ecc5208b906d7f6c90d8c},
intrahash = {7bb8d137b23b8510e29ac3538ffad567},
journal = {Int. J. Embed. Syst.},
keywords = {dblp},
number = 4,
pages = {319-334},
timestamp = {2020-09-12T11:36:21.000+0200},
title = {Hardware-software architecture for priority queue management in real-time and embedded systems.},
url = {http://dblp.uni-trier.de/db/journals/ijes/ijes6.html#KumarVCGZJ14},
volume = 6,
year = 2014
}
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