{"_id":"ajXb9Nt6rdPHJ7dga","bibbaseid":"kusu-borodenkov-ismail-tenhunen-designofapowerperformanceefficientsingleloopsigmadeltamodulatorforwirelessreceivers-2004","downloads":0,"creationDate":"2018-11-02T20:16:34.741Z","title":"Design of a power/performance efficient single-loop sigma-delta modulator for wireless receivers","author_short":["Kusu, A.","Borodenkov, A.","Ismail, M.","Tenhunen, H."],"year":2004,"bibtype":"book","biburl":null,"bibdata":{"title":"Design of a power/performance efficient single-loop sigma-delta modulator for wireless receivers","type":"book","year":"2004","source":"Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)","identifiers":"[object Object]","volume":"3254","id":"8758b8c8-72ce-3183-8998-c4382896e12b","created":"2017-12-04T05:35:02.894Z","file_attached":false,"profile_id":"99d7e05e-a704-3549-ada2-dfc74a2d55ec","last_modified":"2017-12-04T05:35:02.894Z","read":false,"starred":false,"authored":"true","confirmed":false,"hidden":false,"private_publication":false,"abstract":"In order to design high performance sigma-delta A/D converters, it is essential to estimate the Figure-Of-Merit in the design process. This paper describes the design of a power/performance efficient single-loop multibit sigmadelta modulator for wireless applications. Power dissipation is minimized by optimizing the architecture and by a careful design of analog circuitry. A 3 rd order 4-bit ∑-Δ modulator with feedforward path is designed in 0.18um CMOS process operating from 1.8V supply voltage. The modulator dissipates 8.6 mW and achieves a dynamic range of 84/95 dB over a bandwidth of 2000/100 kHz. © Springer-Verlag 2004.","bibtype":"book","author":"Kusu, A. and Borodenkov, A. and Ismail, M. and Tenhunen, H.","bibtex":"@book{\n title = {Design of a power/performance efficient single-loop sigma-delta modulator for wireless receivers},\n type = {book},\n year = {2004},\n source = {Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)},\n identifiers = {[object Object]},\n volume = {3254},\n id = {8758b8c8-72ce-3183-8998-c4382896e12b},\n created = {2017-12-04T05:35:02.894Z},\n file_attached = {false},\n profile_id = {99d7e05e-a704-3549-ada2-dfc74a2d55ec},\n last_modified = {2017-12-04T05:35:02.894Z},\n read = {false},\n starred = {false},\n authored = {true},\n confirmed = {false},\n hidden = {false},\n private_publication = {false},\n abstract = {In order to design high performance sigma-delta A/D converters, it is essential to estimate the Figure-Of-Merit in the design process. This paper describes the design of a power/performance efficient single-loop multibit sigmadelta modulator for wireless applications. Power dissipation is minimized by optimizing the architecture and by a careful design of analog circuitry. A 3 rd order 4-bit ∑-Δ modulator with feedforward path is designed in 0.18um CMOS process operating from 1.8V supply voltage. The modulator dissipates 8.6 mW and achieves a dynamic range of 84/95 dB over a bandwidth of 2000/100 kHz. © Springer-Verlag 2004.},\n bibtype = {book},\n author = {Kusu, A. and Borodenkov, A. and Ismail, M. and Tenhunen, H.}\n}","author_short":["Kusu, A.","Borodenkov, A.","Ismail, M.","Tenhunen, H."],"bibbaseid":"kusu-borodenkov-ismail-tenhunen-designofapowerperformanceefficientsingleloopsigmadeltamodulatorforwirelessreceivers-2004","role":"author","urls":{},"downloads":0,"html":""},"search_terms":["design","power","performance","efficient","single","loop","sigma","delta","modulator","wireless","receivers","kusu","borodenkov","ismail","tenhunen"],"keywords":[],"authorIDs":[]}