Chip-level charged-device modeling and simulation in CMOS integrated circuits. Lee, J., Kim, K., Huh, Y., Bendix, P., & Kang, S. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 22(1):67-81, 2003.
Chip-level charged-device modeling and simulation in CMOS integrated circuits. [link]Link  Chip-level charged-device modeling and simulation in CMOS integrated circuits. [link]Paper  bibtex   
@article{journals/tcad/LeeKHBK03,
  added-at = {2020-09-24T00:00:00.000+0200},
  author = {Lee, Jaesik and Kim, Ki-Wook and Huh, Yoonjong and Bendix, Peter and Kang, Sung-Mo},
  biburl = {https://www.bibsonomy.org/bibtex/2182e8b6f0a1dc1cbf332620e800b999f/dblp},
  ee = {https://doi.org/10.1109/TCAD.2002.805720},
  interhash = {a8581e0f677be2ab8a5c0f73bf8c363f},
  intrahash = {182e8b6f0a1dc1cbf332620e800b999f},
  journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.},
  keywords = {dblp},
  number = 1,
  pages = {67-81},
  timestamp = {2020-09-25T11:49:48.000+0200},
  title = {Chip-level charged-device modeling and simulation in CMOS integrated circuits.},
  url = {http://dblp.uni-trier.de/db/journals/tcad/tcad22.html#LeeKHBK03},
  volume = 22,
  year = 2003
}

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