Poly-Si Thin-Film Transistors: An Efficient and Low-Cost Option for Digital Operation

Poly-Si Thin-Film Transistors: An Efficient and Low-Cost Option for Digital Operation. Li, J., Bansal, A., & Roy, K. IEEE Transactions on Electron Devices, 54(11):2918-2929, Nov, 2007.
doi bibtex

@ARTICLE{li2007ted, 
author={Jing Li and Aditya Bansal and Kaushik Roy}, 
journal={IEEE Transactions on Electron Devices}, 
title={{Poly-Si} Thin-Film Transistors: An Efficient and Low-Cost Option for Digital Operation}, 
year={2007}, 
volume={54}, 
number={11}, 
pages={2918-2929}, 
keywords={journal, elemental semiconductors,low-power electronics,silicon,silicon-on-insulator,thin film transistors,LTPS TFT,SOI,Si - Interface,driving current,low-temperature polycrystalline-silicon thin-film transistors,midgap trap density,poly-Si thin-film transistors,silicon-on-insulator,single-crystalline silicon,submicrometer ultralow-power digital operation,ultralow-power subthreshold operation,Costs,Design methodology,Design optimization,Energy consumption,Fabrication,Glass,Polymers,Silicon,Substrates,Thin film transistors,Grain boundary (GB),low-pressure chemical vapor deposition (LPCVD),low-temperature polycrystalline silicon (LTPS),thin-film transistor (TFT)}, 
doi={10.1109/TED.2007.906940}, 
ISSN={0018-9383}, 
month={Nov},
}

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